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From: Joel Stanley <joel@jms.id.au>
To: Willy Tu <wltu@google.com>
Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>,
	Benjamin Fair <benjaminfair@google.com>
Subject: Re: [PATCH] board: ast2400: Enable SGPIO in SCU
Date: Tue, 13 Apr 2021 23:32:02 +0000	[thread overview]
Message-ID: <CACPK8Xe7zhHbc4Ye3M8w6FLZyTxTxq6U8dX=L7x8cMkS3JSDaQ@mail.gmail.com> (raw)
In-Reply-To: <20210413161150.2815450-1-wltu@google.com>

Hi Willy,

On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu@google.com> wrote:
>
> Add option to enable register for SGPIO in SCU.
>
> Included new function register values for ast2400
> SCU and enable the SGPIO function in board init.

Which branch would you like this patch applied to?

>
> Signed-off-by: Willy Tu <wltu@google.com>
> ---
>  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
>  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
>  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
>  3 files changed, 23 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> index 9c5d96ae84..17eaaf3e9d 100644
> --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> @@ -75,6 +75,10 @@
>  #define SCU_PIN_FUN_SCL2               (1 << 14)
>  #define SCU_PIN_FUN_SDA1               (1 << 13)
>  #define SCU_PIN_FUN_SDA2               (1 << 15)
> +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
> +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
> +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
> +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
>
>  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
>  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
> diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig b/arch/arm/mach-aspeed/ast2400/Kconfig
> index f76276860c..c4e88b5140 100644
> --- a/arch/arm/mach-aspeed/ast2400/Kconfig
> +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
> @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
>           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
>  endchoice
>
> +config ENABLE_SGPIO
> +    tristate "Enable SGPIO in SCU"
> +       default n
> +
>  source "board/aspeed/evb_ast2400/Kconfig"
>
>  endif
> diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c b/arch/arm/mach-aspeed/ast2400/board_common.c
> index 3829b06934..eca2ef03e5 100644
> --- a/arch/arm/mach-aspeed/ast2400/board_common.c
> +++ b/arch/arm/mach-aspeed/ast2400/board_common.c
> @@ -14,6 +14,21 @@ __weak int board_init(void)
>  {
>         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>
> +#ifdef CONFIG_ENABLE_SGPIO
> +#define SCU_BASE 0x1e6e2000
> +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
> +       /* Unlock SCU */
> +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
> +
> +       /* Enable SGPIO Master */
> +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
> +
> +       reg |= (SCU_PIN_FUN_SGPMI  |
> +                       SCU_PIN_FUN_SGPMO  |
> +                       SCU_PIN_FUN_SGPMLD |
> +                       SCU_PIN_FUN_SGPMCK);
> +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
> +#endif
>         return 0;
>  }
>
> --
> 2.31.1.295.g9ea45b61b8-goog
>

  reply	other threads:[~2021-04-13 23:32 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-13 16:11 [PATCH] board: ast2400: Enable SGPIO in SCU Willy Tu
2021-04-13 23:32 ` Joel Stanley [this message]
2021-04-14  0:06   ` Willy Tu
2021-05-26 15:49     ` Willy Tu
2021-05-27  1:57     ` Joel Stanley
2021-05-27  3:14       ` Willy Tu

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