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From: Joel Stanley <joel@jms.id.au>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: "QEMU Developers" <qemu-devel@nongnu.org>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	"OpenBMC Maillist" <openbmc@lists.ozlabs.org>
Subject: Re: [PATCH] aspeed: Implement write-1-{set, clear} for AST2500 strapping
Date: Wed, 11 Jul 2018 15:18:08 +1000	[thread overview]
Message-ID: <CACPK8XefwXLyAzga+8ya5i3iWQoV5XpBJ2zqGTFRsD2A45OPqw@mail.gmail.com> (raw)
In-Reply-To: <20180709143524.17480-1-andrew@aj.id.au>

On 10 July 2018 at 00:35, Andrew Jeffery <andrew@aj.id.au> wrote:
> The AST2500 SoC family changes the runtime behaviour of the hardware
> strapping register (SCU70) to write-1-set/write-1-clear, with
> write-1-clear implemented on the "read-only" SoC revision register
> (SCU7C). For the the AST2400, the hardware strapping is
> runtime-configured with read-modify-write semantics.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>

Reviewed-by: Joel Stanley <joel@jms.id.au>

  reply	other threads:[~2018-07-11  5:18 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-09 14:35 [PATCH] aspeed: Implement write-1-{set,clear} " Andrew Jeffery
2018-07-11  5:18 ` Joel Stanley [this message]
2018-07-12 15:58 ` [PATCH] aspeed: Implement write-1-{set, clear} " Peter Maydell
2018-07-12 16:10   ` Andrew Jeffery
2018-07-12 16:18     ` Peter Maydell

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