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From: Joel Stanley <joel@jms.id.au>
To: ChiaWei Wang <chiawei_wang@aspeedtech.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"kbuild-all@lists.01.org" <kbuild-all@lists.01.org>,
	kernel test robot <lkp@intel.com>,
	"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
	"andrew@aj.id.au" <andrew@aj.id.au>,
	"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 3/4] soc: aspeed: Add eSPI driver
Date: Fri, 27 Aug 2021 05:48:50 +0000	[thread overview]
Message-ID: <CACPK8Xf1g2fp5X3ELBUyjzP6Fmvt1XWLU_UgCKdZaDVjdyKryQ@mail.gmail.com> (raw)
In-Reply-To: <HK0PR06MB377927BDCA9CC79B598251B291C89@HK0PR06MB3779.apcprd06.prod.outlook.com>

On Fri, 27 Aug 2021 at 03:52, ChiaWei Wang <chiawei_wang@aspeedtech.com> wrote:
>
> Aspeed 5th and 6th generation SoCs are based on the ARM 32-bits architecture.
> Should we follow the report to make the driver 64-bits compatible?
> Or revise the driver to use more specific data types?

Yes, in general it's expected your driver will compile cleanly for
64-bit architectures. This helps with testing and static analysis,
where CI builds all the drivers for x86.

Cheers,

Joel

  reply	other threads:[~2021-08-27  5:49 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26  6:16 [PATCH v3 0/4] arm: aspeed: Add eSPI support Chia-Wei Wang
2021-08-26  6:16 ` [PATCH v3 1/4] dt-bindings: aspeed: Add eSPI controller Chia-Wei Wang
2021-08-26 13:26   ` Rob Herring
2021-08-27  3:08     ` ChiaWei Wang
2021-08-26  6:16 ` [PATCH v3 2/4] MAINTAINER: Add ASPEED eSPI driver entry Chia-Wei Wang
2021-08-26  6:16 ` [PATCH v3 3/4] soc: aspeed: Add eSPI driver Chia-Wei Wang
2021-08-26 20:05   ` kernel test robot
2021-08-26 23:30   ` kernel test robot
2021-08-27  3:52     ` ChiaWei Wang
2021-08-27  5:48       ` Joel Stanley [this message]
2021-08-27  8:49         ` ChiaWei Wang
2021-08-27  3:08   ` Jeremy Kerr
2021-08-27  3:20   ` Jeremy Kerr
2021-08-27  3:48     ` ChiaWei Wang
2021-08-27  4:36       ` Jeremy Kerr
2021-08-27  8:49         ` ChiaWei Wang
2021-08-26  6:16 ` [PATCH v3 4/4] ARM: dts: aspeed: Add eSPI node Chia-Wei Wang

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