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* [PATCH linux dev-5.10 00/35] Rainier and Everest system updates
@ 2021-03-08 22:53 Eddie James
  2021-03-08 22:53 ` [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Eddie James
                   ` (35 more replies)
  0 siblings, 36 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

This lengthy series updates device trees and drivers for the AST2600
systems Rainier and Everest.

Patches 1-12 update the Rainier device tree. These changes are well
tested.
Patches 13-15 provide some eMMC improvements.
Patch 16 fixes an observed problem on the Tacoma system.
Patches 17-24 update the Everest device tree. These changes are
somewhat tested in simulation and minimally tested on hardware.
Patch 25 adds device trees for the second version of the Rainier
BMC board.
Patches 26-35 are device driver fixes and improvments. Some have
already been accepted in linux-next.

Alpana Kumari (3):
  ARM: dts: aspeed: rainier: Add presence GPIOs
  ARM: dts: aspeed: everest: GPIOs support
  ARM: dts: aspeed: rainier: Support pass 2 planar

Andrew Jeffery (8):
  dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI
  mmc: sdhci: aspeed: Expose data sample phase delay tuning
  ARM: dts: aspeed: tacoma: Add data sample phase delay for eMMC
  i2c: Allow throttling of transfers to client devices
  pmbus: (ucd9000) Throttle SMBus transfers to avoid poor behaviour
  pmbus: (core) Add a one-shot retry in pmbus_set_page()
  pmbus: (max31785) Add a local pmbus_set_page() implementation
  pmbus: (max31785) Retry enabling fans after writing MFR_FAN_CONFIG

Brandon Wyman (2):
  ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans
  ARM: dts: aspeed: everest: Add power supply i2c devices

Dylan Hung (1):
  ftgmac100: Restart MAC HW once

Eddie James (7):
  ARM: dts: aspeed: rainier: Add additional processor CFAMs
  ARM: dts: aspeed: rainier 4U: Fix fan configuration
  ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO
  ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines
  ARM: dts: Aspeed: Everest: Add RTC
  hwmon: (pmbus) Add a PMBUS_NO_CAPABILITY platform data flag
  hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag

Jim Wright (1):
  ARM: dts: aspeed: everest: Add UCD90320 power sequencer

Joel Stanley (2):
  ARM: dts: aspeed: rainier: Mark controllers as restricted
  fsi: scom: Handle FSI2PIB timeout

Matthew Barth (3):
  ARM: dts: aspeed: rainier: Set MAX31785 config
  ARM: dts: Aspeed: Everest: Add max31785 fan controller device
  ARM: dts: Aspeed: Everest: Add pca9552 fan presence

Milton Miller (1):
  net/ncsi: Avoid channel_monitor hrtimer deadlock

PriyangaRamasamy (1):
  ARM: dts: aspeed: Everest: Add I2C components

Vishwanatha Subbanna (6):
  ARM: dts: aspeed: rainier: Add Operator Panel LEDs
  ARM: dts: aspeed: rainier: Add directly controlled LEDs
  ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  ARM: dts: aspeed: rainier: Add leds that are off pic16f882
  ARM: dts: aspeed: rainier: Add leds on optional DASD cards
  ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable
    cards

 .../devicetree/bindings/mmc/aspeed,sdhci.yaml |    8 +
 arch/arm/boot/dts/Makefile                    |    2 +
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts  | 1756 +++++++++++-
 .../boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts |  198 ++
 .../boot/dts/aspeed-bmc-ibm-rainier-4u.dts    |   14 +
 .../boot/dts/aspeed-bmc-ibm-rainier-v2.dts    |  198 ++
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts  | 2411 +++++++++++++++--
 arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts   |    3 +-
 drivers/fsi/fsi-scom.c                        |   18 +
 drivers/hwmon/pmbus/ibm-cffps.c               |    2 +-
 drivers/hwmon/pmbus/max31785.c                |   55 +-
 drivers/hwmon/pmbus/pmbus_core.c              |   39 +-
 drivers/hwmon/pmbus/ucd9000.c                 |    4 +
 drivers/i2c/i2c-core-base.c                   |    8 +-
 drivers/i2c/i2c-core-smbus.c                  |  169 +-
 drivers/i2c/i2c-core.h                        |   21 +
 drivers/mmc/host/sdhci-of-aspeed.c            |   65 +-
 drivers/net/ethernet/faraday/ftgmac100.c      |    1 +
 include/linux/i2c.h                           |    5 +
 include/linux/pmbus.h                         |    9 +
 net/ncsi/ncsi-manage.c                        |   18 +-
 21 files changed, 4662 insertions(+), 342 deletions(-)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-v2.dts

-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:05   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 02/35] ARM: dts: aspeed: rainier: Add directly controlled LEDs Eddie James
                   ` (34 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Vishwanatha Subbanna <vishwa@linux.ibm.com>

These LEDs are on the op-panel and are connected via a pca9551 i2c
LED expander.

OpenBMC-Staging-Count: 1
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 82 ++++++++++++++++++++
 1 file changed, 82 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 0e1e76421d9d..fdeac6d0d8d3 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -131,6 +131,38 @@ i2c2mux3: i2c@3 {
 			reg = <3>;
 		};
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		/* System ID LED that is at front on Op Panel */
+		front-sys-id0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca_oppanel 0 GPIO_ACTIVE_LOW>;
+		};
+
+		/* System Attention Indicator ID LED that is at front on Op Panel */
+		front-check-log0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca_oppanel 1 GPIO_ACTIVE_LOW>;
+		};
+
+		/* Enclosure Fault LED that is at front on Op Panel */
+		front-enc-fault1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca_oppanel 2 GPIO_ACTIVE_LOW>;
+		};
+
+		/* System PowerOn LED that is at front on Op Panel */
+		front-sys-pwron0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &ehci1 {
@@ -848,6 +880,56 @@ ibm-panel@62 {
 		reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
 	};
 
+	pca_oppanel: pca9551@60 {
+		compatible = "nxp,pca9551";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
 	dps: dps310@76 {
 		compatible = "infineon,dps310";
 		reg = <0x76>;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 02/35] ARM: dts: aspeed: rainier: Add directly controlled LEDs
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
  2021-03-08 22:53 ` [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:04   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 03/35] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans Eddie James
                   ` (33 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Vishwanatha Subbanna <vishwa@linux.ibm.com>

These LEDs are directly connected to the BMC's GPIO bank.

OpenBMC-Staging-Count: 1
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 24 ++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index fdeac6d0d8d3..f52c10dd1a18 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -135,6 +135,26 @@ i2c2mux3: i2c@3 {
 	leds {
 		compatible = "gpio-leds";
 
+		/* BMC Card fault LED at the back */
+		bmc-ingraham0 {
+			gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>;
+		};
+
+		/* Enclosure ID LED at the back */
+		rear-enc-id0 {
+			gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>;
+		};
+
+		/* Enclosure fault LED at the back */
+		rear-enc-fault0 {
+			gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
+		};
+
+		/* PCIE slot power LED */
+		pcieslot-power {
+			gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>;
+		};
+
 		/* System ID LED that is at front on Op Panel */
 		front-sys-id0 {
 			retain-state-shutdown;
@@ -178,7 +198,7 @@ &gpio0 {
 	/*E0-E7*/	"","","","","","","","",
 	/*F0-F7*/	"","","","","","","","",
 	/*G0-G7*/	"","","","","","","","",
-	/*H0-H7*/	"","","","","","","","",
+	/*H0-H7*/	"","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",
 	/*I0-I7*/	"","","","","","","","",
 	/*J0-J7*/	"","","","","","","","",
 	/*K0-K7*/	"","","","","","","","",
@@ -186,7 +206,7 @@ &gpio0 {
 	/*M0-M7*/	"","","","","","","","",
 	/*N0-N7*/	"","","","","","","","",
 	/*O0-O7*/	"","","","usb-power","","","","",
-	/*P0-P7*/	"","","","","","","","",
+	/*P0-P7*/	"","","","","pcieslot-power","","","",
 	/*Q0-Q7*/	"cfam-reset","","","","","","","",
 	/*R0-R7*/	"","","","","","","","",
 	/*S0-S7*/	"presence-ps0","presence-ps1","presence-ps2","presence-ps3",
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 03/35] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
  2021-03-08 22:53 ` [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Eddie James
  2021-03-08 22:53 ` [PATCH linux dev-5.10 02/35] ARM: dts: aspeed: rainier: Add directly controlled LEDs Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:06   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 04/35] ARM: dts: aspeed: rainier: Set MAX31785 config Eddie James
                   ` (32 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Brandon Wyman <bjwyman@gmail.com>

Add a gpio-keys-polled section to the Rainier device tree for the fan
presence signals on the PCA9552 I2C device on bus 7.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 43 ++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index f52c10dd1a18..98c396283c1b 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -183,6 +183,49 @@ front-sys-pwron0 {
 			gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
 		};
 	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <1000>;
+
+		fan0-presence {
+			label = "fan0-presence";
+			gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
+			linux,code = <6>;
+		};
+
+		fan1-presence {
+			label = "fan1-presence";
+			gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
+			linux,code = <7>;
+		};
+
+		fan2-presence {
+			label = "fan2-presence";
+			gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
+			linux,code = <8>;
+		};
+
+		fan3-presence {
+			label = "fan3-presence";
+			gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
+			linux,code = <9>;
+		};
+
+		fan4-presence {
+			label = "fan4-presence";
+			gpios = <&pca0 10 GPIO_ACTIVE_LOW>;
+			linux,code = <10>;
+		};
+
+		fan5-presence {
+			label = "fan5-presence";
+			gpios = <&pca0 11 GPIO_ACTIVE_LOW>;
+			linux,code = <11>;
+		};
+	};
 };
 
 &ehci1 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 04/35] ARM: dts: aspeed: rainier: Set MAX31785 config
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (2 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 03/35] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:07   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 05/35] ARM: dts: aspeed: rainier: Add additional processor CFAMs Eddie James
                   ` (31 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Matthew Barth <msbarth@linux.ibm.com>

Set the MAX31785 device configuration properties

Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 54 ++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 98c396283c1b..e147ff549517 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -827,24 +827,78 @@ fan0: fan@0 {
 			compatible = "pmbus-fan";
 			reg = <0>;
 			tach-pulses = <2>;
+			maxim,fan-rotor-input = "tach";
+			maxim,fan-pwm-freq = <25000>;
+			maxim,fan-dual-tach;
+			maxim,fan-no-watchdog;
+			maxim,fan-no-fault-ramp;
+			maxim,fan-ramp = <2>;
+			maxim,fan-fault-pin-mon;
 		};
 
 		fan1: fan@1 {
 			compatible = "pmbus-fan";
 			reg = <1>;
 			tach-pulses = <2>;
+			maxim,fan-rotor-input = "tach";
+			maxim,fan-pwm-freq = <25000>;
+			maxim,fan-dual-tach;
+			maxim,fan-no-watchdog;
+			maxim,fan-no-fault-ramp;
+			maxim,fan-ramp = <2>;
+			maxim,fan-fault-pin-mon;
 		};
 
 		fan2: fan@2 {
 			compatible = "pmbus-fan";
 			reg = <2>;
 			tach-pulses = <2>;
+			maxim,fan-rotor-input = "tach";
+			maxim,fan-pwm-freq = <25000>;
+			maxim,fan-dual-tach;
+			maxim,fan-no-watchdog;
+			maxim,fan-no-fault-ramp;
+			maxim,fan-ramp = <2>;
+			maxim,fan-fault-pin-mon;
 		};
 
 		fan3: fan@3 {
 			compatible = "pmbus-fan";
 			reg = <3>;
 			tach-pulses = <2>;
+			maxim,fan-rotor-input = "tach";
+			maxim,fan-pwm-freq = <25000>;
+			maxim,fan-dual-tach;
+			maxim,fan-no-watchdog;
+			maxim,fan-no-fault-ramp;
+			maxim,fan-ramp = <2>;
+			maxim,fan-fault-pin-mon;
+		};
+
+		fan4: fan@4 {
+			compatible = "pmbus-fan";
+			reg = <4>;
+			tach-pulses = <2>;
+			maxim,fan-rotor-input = "tach";
+			maxim,fan-pwm-freq = <25000>;
+			maxim,fan-dual-tach;
+			maxim,fan-no-watchdog;
+			maxim,fan-no-fault-ramp;
+			maxim,fan-ramp = <2>;
+			maxim,fan-fault-pin-mon;
+		};
+
+		fan5: fan@5 {
+			compatible = "pmbus-fan";
+			reg = <5>;
+			tach-pulses = <2>;
+			maxim,fan-rotor-input = "tach";
+			maxim,fan-pwm-freq = <25000>;
+			maxim,fan-dual-tach;
+			maxim,fan-no-watchdog;
+			maxim,fan-no-fault-ramp;
+			maxim,fan-ramp = <2>;
+			maxim,fan-fault-pin-mon;
 		};
 	};
 
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 05/35] ARM: dts: aspeed: rainier: Add additional processor CFAMs
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (3 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 04/35] ARM: dts: aspeed: rainier: Set MAX31785 config Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:07   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Eddie James
                   ` (30 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

Rainier has two dual-chip modules and therefore four CFAMs with their
associated engines. Add these to the devicetree with the i2c busses
that have devices on them.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 281 ++++++++++++++++++-
 1 file changed, 279 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index e147ff549517..6684485a2db0 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -12,6 +12,39 @@ / {
 	compatible = "ibm,rainier-bmc", "aspeed,ast2600";
 
 	aliases {
+		i2c100 = &cfam0_i2c0;
+		i2c101 = &cfam0_i2c1;
+		i2c110 = &cfam0_i2c10;
+		i2c111 = &cfam0_i2c11;
+		i2c112 = &cfam0_i2c12;
+		i2c113 = &cfam0_i2c13;
+		i2c114 = &cfam0_i2c14;
+		i2c115 = &cfam0_i2c15;
+		i2c202 = &cfam1_i2c2;
+		i2c203 = &cfam1_i2c3;
+		i2c210 = &cfam1_i2c10;
+		i2c211 = &cfam1_i2c11;
+		i2c214 = &cfam1_i2c14;
+		i2c215 = &cfam1_i2c15;
+		i2c216 = &cfam1_i2c16;
+		i2c217 = &cfam1_i2c17;
+		i2c300 = &cfam2_i2c0;
+		i2c301 = &cfam2_i2c1;
+		i2c310 = &cfam2_i2c10;
+		i2c311 = &cfam2_i2c11;
+		i2c312 = &cfam2_i2c12;
+		i2c313 = &cfam2_i2c13;
+		i2c314 = &cfam2_i2c14;
+		i2c315 = &cfam2_i2c15;
+		i2c402 = &cfam3_i2c2;
+		i2c403 = &cfam3_i2c3;
+		i2c410 = &cfam3_i2c10;
+		i2c411 = &cfam3_i2c11;
+		i2c414 = &cfam3_i2c14;
+		i2c415 = &cfam3_i2c15;
+		i2c416 = &cfam3_i2c16;
+		i2c417 = &cfam3_i2c17;
+
 		serial4 = &uart5;
 		i2c16 = &i2c2mux0;
 		i2c17 = &i2c2mux1;
@@ -30,6 +63,10 @@ aliases {
 		spi31 = &cfam2_spi1;
 		spi32 = &cfam2_spi2;
 		spi33 = &cfam2_spi3;
+		spi40 = &cfam3_spi0;
+		spi41 = &cfam3_spi1;
+		spi42 = &cfam3_spi2;
+		spi43 = &cfam3_spi3;
 	};
 
 	chosen {
@@ -320,6 +357,38 @@ i2c@1800 {
 			reg = <0x1800 0x400>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+
+			cfam0_i2c0: i2c-bus@0 {
+				reg = <0>;	/* OMI01 */
+			};
+
+			cfam0_i2c1: i2c-bus@1 {
+				reg = <1>;	/* OMI23 */
+			};
+
+			cfam0_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam0_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam0_i2c12: i2c-bus@c {
+				reg = <12>;	/* OP4A */
+			};
+
+			cfam0_i2c13: i2c-bus@d {
+				reg = <13>;	/* OP4B */
+			};
+
+			cfam0_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam0_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
 		};
 
 		fsi2spi@1c00 {
@@ -411,8 +480,6 @@ fsi_hub0: hub@3400 {
 			reg = <0x3400 0x400>;
 			#address-cells = <2>;
 			#size-cells = <0>;
-
-			no-scan-on-init;
 		};
 	};
 };
@@ -434,6 +501,38 @@ i2c@1800 {
 			reg = <0x1800 0x400>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+
+			cfam1_i2c2: i2c-bus@2 {
+				reg = <2>;	/* OMI45 */
+			};
+
+			cfam1_i2c3: i2c-bus@3 {
+				reg = <3>;	/* OMI67 */
+			};
+
+			cfam1_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam1_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam1_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam1_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
+
+			cfam1_i2c16: i2c-bus@10 {
+				reg = <16>;	/* OP6A */
+			};
+
+			cfam1_i2c17: i2c-bus@11 {
+				reg = <17>;	/* OP6B */
+			};
 		};
 
 		fsi2spi@1c00 {
@@ -546,6 +645,38 @@ i2c@1800 {
 			reg = <0x1800 0x400>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+
+			cfam2_i2c0: i2c-bus@0 {
+				reg = <0>;	/* OM01 */
+			};
+
+			cfam2_i2c1: i2c-bus@1 {
+				reg = <1>;	/* OM23 */
+			};
+
+			cfam2_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam2_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam2_i2c12: i2c-bus@c {
+				reg = <12>;	/* OP4A */
+			};
+
+			cfam2_i2c13: i2c-bus@d {
+				reg = <13>;	/* OP4B */
+			};
+
+			cfam2_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam2_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
 		};
 
 		fsi2spi@1c00 {
@@ -641,6 +772,148 @@ fsi_hub2: hub@3400 {
 			no-scan-on-init;
 		};
 	};
+
+	cfam@3,0 {
+		reg = <3 0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		chip-id = <3>;
+
+		scom@1000 {
+			compatible = "ibm,fsi2pib";
+			reg = <0x1000 0x400>;
+		};
+
+		i2c@1800 {
+			compatible = "ibm,fsi-i2c-master";
+			reg = <0x1800 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam3_i2c2: i2c-bus@2 {
+				reg = <2>;	/* OM45 */
+			};
+
+			cfam3_i2c3: i2c-bus@3 {
+				reg = <3>;	/* OM67 */
+			};
+
+			cfam3_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam3_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam3_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam3_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
+
+			cfam3_i2c16: i2c-bus@10 {
+				reg = <16>;	/* OP6A */
+			};
+
+			cfam3_i2c17: i2c-bus@11 {
+				reg = <17>;	/* OP6B */
+			};
+		};
+
+		fsi2spi@1c00 {
+			compatible = "ibm,fsi2spi";
+			reg = <0x1c00 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam3_spi0: spi@0 {
+				reg = <0x0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam3_spi1: spi@20 {
+				reg = <0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam3_spi2: spi@40 {
+				reg = <0x40>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam3_spi3: spi@60 {
+				reg = <0x60>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+		};
+
+		sbefifo@2400 {
+			compatible = "ibm,p9-sbefifo";
+			reg = <0x2400 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			fsi_occ3: occ {
+				compatible = "ibm,p10-occ";
+			};
+		};
+
+		fsi_hub3: hub@3400 {
+			compatible = "fsi-master-hub";
+			reg = <0x3400 0x400>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			no-scan-on-init;
+		};
+	};
 };
 
 /* Legacy OCC numbering (to get rid of when userspace is fixed) */
@@ -656,6 +929,10 @@ &fsi_occ2 {
 	reg = <3>;
 };
 
+&fsi_occ3 {
+	reg = <4>;
+};
+
 &ibt {
 	status = "okay";
 };
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (4 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 05/35] ARM: dts: aspeed: rainier: Add additional processor CFAMs Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:09   ` Joel Stanley
  2021-03-12  0:21   ` Milton Miller II
  2021-03-08 22:53 ` [PATCH linux dev-5.10 07/35] ARM: dts: aspeed: rainier: Add leds that are off pic16f882 Eddie James
                   ` (29 subsequent siblings)
  35 siblings, 2 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>

These LEDs are on the fans and are connected via a
pca9551 i2c expander

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 41 ++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 6684485a2db0..514a14d3f914 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -263,6 +263,47 @@ fan5-presence {
 			linux,code = <11>;
 		};
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		fan0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
+		};
+
+		fan1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
+		};
+
+		fan2 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
+		};
+
+		fan3 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
+		};
+
+		fan4 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
+		};
+
+		fan5 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 };
 
 &ehci1 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 07/35] ARM: dts: aspeed: rainier: Add leds that are off pic16f882
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (5 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:10   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 08/35] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Eddie James
                   ` (28 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>

There are many LEDs that are connected to PIC16F882.
PIC has the software implementation of pca9552

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 690 +++++++++++++++++++
 1 file changed, 690 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 514a14d3f914..32b63112091c 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -302,6 +302,336 @@ fan5 {
 			default-state = "keep";
 			gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
 		};
+
+		ddimm0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 0 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 1 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm2 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 2 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm3 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 3 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm4 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 4 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm5 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 5 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm6 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 6 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm7 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 7 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm8 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 8 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm9 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 9 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm10 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 10 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm11 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 11 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm12 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 12 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm13 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 13 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm14 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 14 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm15 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic1 15 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm16 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 0 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm17 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm18 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 2 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm19 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 3 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm20 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 4 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm21 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 5 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm22 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 6 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm23 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 7 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm24 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 8 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm25 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 9 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm26 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 10 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm27 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 11 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm28 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 12 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm29 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 13 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm30 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 14 GPIO_ACTIVE_LOW>;
+		};
+
+		ddimm31 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic2 15 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 0 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 1 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot2 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 2 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot3 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 3 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot4 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 4 GPIO_ACTIVE_LOW>;
+		};
+
+		cpu1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 5 GPIO_ACTIVE_LOW>;
+		};
+
+		cpu1-vrm0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 6 GPIO_ACTIVE_LOW>;
+		};
+
+		lcd-russel {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic3 8 GPIO_ACTIVE_LOW>;
+		};
+
+		planar {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 0 GPIO_ACTIVE_LOW>;
+		};
+
+		cpu0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 1 GPIO_ACTIVE_LOW>;
+		};
+
+		dasd-pyramid0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 3 GPIO_ACTIVE_LOW>;
+		};
+
+		dasd-pyramid1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 4 GPIO_ACTIVE_LOW>;
+		};
+
+		dasd-pyramid2 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 5 GPIO_ACTIVE_LOW>;
+		};
+
+		cpu0-vrm0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 6 GPIO_ACTIVE_LOW>;
+		};
+
+		rtc-battery {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 7 GPIO_ACTIVE_LOW>;
+		};
+
+		base-blyth {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 8 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot6 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 9 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot7 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 10 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot8 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 11 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot9 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 12 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot10 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 13 GPIO_ACTIVE_LOW>;
+		};
+
+		pcieslot11 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 14 GPIO_ACTIVE_LOW>;
+		};
+
+		tpm-wilson {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
+		};
 	};
 
 };
@@ -1365,6 +1695,366 @@ gpio@7 {
 		};
 	};
 
+	pic1: pca9952@32 {
+		compatible = "ibm,pca9552";
+		reg = <0x32>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
+	pic2: pca9552@31 {
+		compatible = "ibm,pca9552";
+		reg = <0x31>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
+	pic3: pca9552@30 {
+		compatible = "ibm,pca9552";
+		reg = <0x30>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
+	pic4: pca9552@33 {
+		compatible = "ibm,pca9552";
+		reg = <0x33>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
 	dps: dps310@76 {
 		compatible = "infineon,dps310";
 		reg = <0x76>;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 08/35] ARM: dts: aspeed: rainier: Add leds on optional DASD cards
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (6 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 07/35] ARM: dts: aspeed: rainier: Add leds that are off pic16f882 Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:10   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 09/35] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Eddie James
                   ` (27 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>

These cards are not hot pluggable and must be installed
prior to boot. LEDs on these are controlled by PCA9552
i2c expander

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 425 +++++++++++++++++++
 1 file changed, 425 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 32b63112091c..c507e8da101e 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -634,6 +634,161 @@ tpm-wilson {
 		};
 	};
 
+	leds-optional-dasd-pyramid0 {
+		compatible = "gpio-leds";
+
+		nvme0 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 0 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme1 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme2 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 2 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme3 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 3 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme4 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 4 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme5 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 5 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme6 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 6 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme7 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca2 7 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds-optional-dasd-pyramid1 {
+		compatible = "gpio-leds";
+
+		nvme8 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 0 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme9 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 1 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme10 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 2 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme11 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 3 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme12 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 4 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme13 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme14 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme15 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds-optional-dasd-pyramid2 {
+		compatible = "gpio-leds";
+
+		nvme16 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme17 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme18 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme19 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme20 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 4 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme21 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 5 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme22 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 6 GPIO_ACTIVE_LOW>;
+		};
+
+		nvme23 {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &ehci1 {
@@ -2269,6 +2424,96 @@ eeprom@50 {
 		compatible = "atmel,24c64";
 		reg = <0x50>;
 	};
+
+	pca2: pca9552@60 {
+		compatible = "nxp,pca9552";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c14 {
@@ -2278,6 +2523,96 @@ eeprom@50 {
 		compatible = "atmel,24c64";
 		reg = <0x50>;
 	};
+
+	pca3: pca9552@60 {
+		compatible = "nxp,pca9552";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c15 {
@@ -2287,6 +2622,96 @@ eeprom@50 {
 		compatible = "atmel,24c64";
 		reg = <0x50>;
 	};
+
+	pca4: pca9552@60 {
+		compatible = "nxp,pca9552";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &vuart1 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 09/35] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (7 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 08/35] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:11   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 10/35] ARM: dts: aspeed: rainier: Add presence GPIOs Eddie James
                   ` (26 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>

These are LEDs on the cable cards that plug into PCIE slots.
The LEDs are controlled by pca9552 i2c expander

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 264 +++++++++++++++++++
 1 file changed, 264 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index c507e8da101e..3a9183bae259 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -789,6 +789,70 @@ nvme23 {
 			gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
 		};
 	};
+
+	leds-optional-cablecard0 {
+		compatible = "gpio-leds";
+
+		cablecard0-cxp-top {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
+		};
+
+		cablecard0-cxp-bot {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds-optional-cablecard3 {
+		compatible = "gpio-leds";
+
+		cablecard3-cxp-top {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
+		};
+
+		cablecard3-cxp-bot {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds-optional-cablecard4 {
+		compatible = "gpio-leds";
+
+		cablecard4-cxp-top {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
+		};
+
+		cablecard4-cxp-bot {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds-optional-cablecard10 {
+		compatible = "gpio-leds";
+
+		cablecard10-cxp-top {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
+		};
+
+		cablecard10-cxp-bot {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &ehci1 {
@@ -1541,6 +1605,56 @@ eeprom@52 {
 		compatible = "atmel,24c64";
 		reg = <0x52>;
 	};
+
+	pca5: pca9551@60 {
+		compatible = "nxp,pca9551";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c5 {
@@ -1565,6 +1679,106 @@ eeprom@51 {
 		compatible = "atmel,24c64";
 		reg = <0x51>;
 	};
+
+	pca6: pca9551@60 {
+		compatible = "nxp,pca9551";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
+
+	pca7: pca9551@61 {
+		compatible = "nxp,pca9551";
+		reg = <0x61>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c6 {
@@ -2411,6 +2625,56 @@ eeprom@51 {
 		compatible = "atmel,24c64";
 		reg = <0x51>;
 	};
+
+	pca8: pca9551@60 {
+		compatible = "nxp,pca9551";
+		reg = <0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c12 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 10/35] ARM: dts: aspeed: rainier: Add presence GPIOs
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (8 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 09/35] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:14   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 11/35] ARM: dts: aspeed: rainier: Mark controllers as restricted Eddie James
                   ` (25 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Alpana Kumari <alpankum@in.ibm.com>

This commit adds presence detect GPIO chips
for various FRUs on Rainier.

Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 169 ++++++++++++++++++-
 1 file changed, 160 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 3a9183bae259..5ee87d749ce8 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -1535,20 +1535,64 @@ eeprom@51 {
 		reg = <0x51>;
 	};
 
-	tca9554@40 {
+	tca_pres1: tca9554@20{
 		compatible = "ti,tca9554";
-		reg = <0x40>;
+		reg = <0x20>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		gpio-controller;
 		#gpio-cells = <2>;
 
-		smbus0 {
-			gpio-hog;
-			gpios = <4 GPIO_ACTIVE_HIGH>;
-			output-high;
-			line-name = "smbus0";
+		gpio-line-names = "",
+			"RUSSEL_FW_I2C_ENABLE_N",
+			"RUSSEL_OPPANEL_PRESENCE_N",
+			"BLYTH_OPPANEL_PRESENCE_N",
+			"CPU_TPM_CARD_PRESENT_N",
+			"DASD_BP2_PRESENT_N",
+			"DASD_BP1_PRESENT_N",
+			"DASD_BP0_PRESENT_N";
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
 		};
-	};
 
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c1 {
@@ -1571,6 +1615,104 @@ power-supply@69 {
 		compatible = "ibm,cffps";
 		reg = <0x69>;
 	};
+
+	pca_pres1: pca9552@61 {
+		compatible = "nxp,pca9552";
+		reg = <0x61>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+			"SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD",
+			"SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD",
+			"SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N",
+			"SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N",
+			"SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N",
+			"", "", "", "", "", "";
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c4 {
@@ -2474,7 +2616,7 @@ eeprom@51 {
 		reg = <0x51>;
 	};
 
-	pca1: pca9552@61 {
+	pca_pres3: pca9552@61 {
 		compatible = "nxp,pca9552";
 		reg = <0x61>;
 		#address-cells = <1>;
@@ -2482,6 +2624,15 @@ pca1: pca9552@61 {
 		gpio-controller;
 		#gpio-cells = <2>;
 
+		gpio-line-names =
+			"SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD",
+			"SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD",
+			"SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD",
+			"SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N",
+			"SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N",
+			"SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N",
+			"", "", "", "";
+
 		gpio@0 {
 			reg = <0>;
 			type = <PCA955X_TYPE_GPIO>;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 11/35] ARM: dts: aspeed: rainier: Mark controllers as restricted
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (9 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 10/35] ARM: dts: aspeed: rainier: Add presence GPIOs Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:15   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 12/35] ARM: dts: aspeed: rainier 4U: Fix fan configuration Eddie James
                   ` (24 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Joel Stanley <joel@jms.id.au>

Some devices cannot use the loop command due to security requirements.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 5ee87d749ce8..85fb60d16fdf 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -1453,6 +1453,7 @@ eeprom@0 {
 
 			cfam3_spi2: spi@40 {
 				reg = <0x40>;
+				compatible = "ibm,fsi2spi-restricted";
 				#address-cells = <1>;
 				#size-cells = <0>;
 
@@ -1469,6 +1470,7 @@ eeprom@0 {
 
 			cfam3_spi3: spi@60 {
 				reg = <0x60>;
+				compatible = "ibm,fsi2spi-restricted";
 				#address-cells = <1>;
 				#size-cells = <0>;
 
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 12/35] ARM: dts: aspeed: rainier 4U: Fix fan configuration
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (10 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 11/35] ARM: dts: aspeed: rainier: Mark controllers as restricted Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:17   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI Eddie James
                   ` (23 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

The 4U fans didn't have the correct properties since the fan nodes
were redefined. Fix this by referencing each fan individually and
adding the differences to the 4U fans.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
index 291f7d6c9979..f7fd3b3c90d0 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
@@ -22,16 +22,30 @@ power-supply@6b {
 
 &fan0 {
 	tach-pulses = <4>;
+	/delete-property/ maxim,fan-dual-tach;
 };
 
 &fan1 {
 	tach-pulses = <4>;
+	/delete-property/ maxim,fan-dual-tach;
 };
 
 &fan2 {
 	tach-pulses = <4>;
+	/delete-property/ maxim,fan-dual-tach;
 };
 
 &fan3 {
 	tach-pulses = <4>;
+	/delete-property/ maxim,fan-dual-tach;
+};
+
+&fan4 {
+	tach-pulses = <4>;
+	/delete-property/ maxim,fan-dual-tach;
+};
+
+&fan5 {
+	tach-pulses = <4>;
+	/delete-property/ maxim,fan-dual-tach;
 };
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (11 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 12/35] ARM: dts: aspeed: rainier 4U: Fix fan configuration Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-12  0:19   ` Joel Stanley
  2021-03-08 22:53 ` [PATCH linux dev-5.10 14/35] mmc: sdhci: aspeed: Expose data sample phase delay tuning Eddie James
                   ` (22 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

Add properties to control the phase delay for input and output data
sampling.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
index 987b287f3bff..ebcb9ed4e308 100644
--- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
@@ -37,6 +37,14 @@ properties:
   clocks:
     maxItems: 1
     description: The SD/SDIO controller clock gate
+  "aspeed,input-phase":
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      The input clock phase delay value.
+  "aspeed,output-phase":
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      The output clock phase delay value.
 
 patternProperties:
   "^sdhci@[0-9a-f]+$":
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 14/35] mmc: sdhci: aspeed: Expose data sample phase delay tuning
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (12 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-08 22:53 ` [PATCH linux dev-5.10 15/35] ARM: dts: aspeed: tacoma: Add data sample phase delay for eMMC Eddie James
                   ` (21 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

Allow sample phase adjustment to deal with layout or tolerance issues.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 drivers/mmc/host/sdhci-of-aspeed.c | 65 ++++++++++++++++++++++++++++--
 1 file changed, 62 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
index 4f008ba3280e..21c40e3ad762 100644
--- a/drivers/mmc/host/sdhci-of-aspeed.c
+++ b/drivers/mmc/host/sdhci-of-aspeed.c
@@ -2,6 +2,7 @@
 /* Copyright (C) 2019 ASPEED Technology Inc. */
 /* Copyright (C) 2019 IBM Corp. */
 
+#include <linux/bitfield.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/device.h>
@@ -16,9 +17,14 @@
 
 #include "sdhci-pltfm.h"
 
-#define ASPEED_SDC_INFO		0x00
-#define   ASPEED_SDC_S1MMC8	BIT(25)
-#define   ASPEED_SDC_S0MMC8	BIT(24)
+#define ASPEED_SDC_INFO			0x00
+#define   ASPEED_SDC_S1MMC8		BIT(25)
+#define   ASPEED_SDC_S0MMC8		BIT(24)
+#define ASPEED_SDC_PHASE		0xf4
+#define   ASPEED_SDC_PHASE_IN		GENMASK(20, 16)
+#define   ASPEED_SDC_PHASE_OUT		GENMASK(7, 3)
+#define   ASPEED_SDC_PHASE_IN_EN	BIT(2)
+#define   ASPEED_SDC_PHASE_OUT_EN	GENMASK(1, 0)
 
 struct aspeed_sdc {
 	struct clk *clk;
@@ -247,6 +253,55 @@ static struct platform_driver aspeed_sdhci_driver = {
 	.remove		= aspeed_sdhci_remove,
 };
 
+static int aspeed_sdc_configure_of(struct platform_device *pdev,
+				   struct aspeed_sdc *sdc)
+{
+	u32 phase, iphase, ophase;
+	struct device_node *np;
+	struct device *dev;
+	int ret;
+
+	dev = &pdev->dev;
+	np = dev->of_node;
+	phase = 0;
+
+	ret = of_property_read_u32(np, "aspeed,input-phase", &iphase);
+	if (ret < 0) {
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_IN, 0);
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_IN_EN, 0);
+		dev_dbg(dev, "Input phase configuration disabled");
+	} else if (iphase >= (1 << 5)) {
+		dev_err(dev,
+			"Input phase value exceeds field range (5 bits): %u",
+			iphase);
+		return -ERANGE;
+	} else {
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_IN, iphase);
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_IN_EN, 1);
+		dev_info(dev, "Input phase relationship: %u", iphase);
+	}
+
+	ret = of_property_read_u32(np, "aspeed,output-phase", &ophase);
+	if (ret < 0) {
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_OUT, 0);
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_OUT_EN, 0);
+		dev_dbg(dev, "Output phase configuration disabled");
+	} else if (ophase >= (1 << 5)) {
+		dev_err(dev,
+			"Output phase value exceeds field range (5 bits): %u",
+			iphase);
+		return -ERANGE;
+	} else {
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_OUT, ophase);
+		phase |= FIELD_PREP(ASPEED_SDC_PHASE_OUT_EN, 3);
+		dev_info(dev, "Output phase relationship: %u", ophase);
+	}
+
+	writel(phase, sdc->regs + ASPEED_SDC_PHASE);
+
+	return 0;
+}
+
 static int aspeed_sdc_probe(struct platform_device *pdev)
 
 {
@@ -277,6 +332,10 @@ static int aspeed_sdc_probe(struct platform_device *pdev)
 		goto err_clk;
 	}
 
+	ret = aspeed_sdc_configure_of(pdev, sdc);
+	if (ret)
+		goto err_clk;
+
 	dev_set_drvdata(&pdev->dev, sdc);
 
 	parent = pdev->dev.of_node;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 15/35] ARM: dts: aspeed: tacoma: Add data sample phase delay for eMMC
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (13 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 14/35] mmc: sdhci: aspeed: Expose data sample phase delay tuning Eddie James
@ 2021-03-08 22:53 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 16/35] ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO Eddie James
                   ` (20 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:53 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

Adjust the phase delay to avoid data timeout splats like the following:

[  731.368601] mmc0: Timeout waiting for hardware interrupt.
[  731.374644] mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
[  731.381828] mmc0: sdhci: Sys addr:  0x00000020 | Version:  0x00000002
[  731.389012] mmc0: sdhci: Blk size:  0x00007200 | Blk cnt:  0x00000020
[  731.396194] mmc0: sdhci: Argument:  0x00462a18 | Trn mode: 0x0000002b
[  731.403377] mmc0: sdhci: Present:   0x01f70106 | Host ctl: 0x00000017
[  731.410559] mmc0: sdhci: Power:     0x0000000f | Blk gap:  0x00000000
[  731.417733] mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x00000107
[  731.424915] mmc0: sdhci: Timeout:   0x0000000e | Int stat: 0x00000000
[  731.432098] mmc0: sdhci: Int enab:  0x03ff008b | Sig enab: 0x03ff008b
[  731.439282] mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[  731.446464] mmc0: sdhci: Caps:      0x01f80080 | Caps_1:   0x00000007
[  731.453647] mmc0: sdhci: Cmd:       0x0000193a | Max curr: 0x001f0f08
[  731.460829] mmc0: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0xffffffff
[  731.468013] mmc0: sdhci: Resp[2]:   0x320f5913 | Resp[3]:  0x00000900
[  731.475195] mmc0: sdhci: Host ctl2: 0x0000008b
[  731.480139] mmc0: sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0xbe040200
[  731.487321] mmc0: sdhci: ============================================

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
index 57508b9e264d..8bd21921c691 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
@@ -185,6 +185,8 @@ &mac2 {
 
 &emmc_controller {
 	status = "okay";
+	aspeed,input-phase = <0x7>;
+	aspeed,output-phase = <0x1f>;
 };
 
 &emmc {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 16/35] ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (14 preceding siblings ...)
  2021-03-08 22:53 ` [PATCH linux dev-5.10 15/35] ARM: dts: aspeed: tacoma: Add data sample phase delay for eMMC Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 17/35] ARM: dts: aspeed: Everest: Add I2C components Eddie James
                   ` (19 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

witherspoon hardware and p9 chips have very sensitive requirements for
the cfam-reset. We're seeing power faults with the kernel based cfam
reset due to this.

Could adapt the power application to use the new kernel based cfam reset
interface but there's not a lot to be gained there since the power
application is going away with p10 and this limitation is not present in
p10.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
index 8bd21921c691..d61697fc21d7 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
@@ -201,7 +201,6 @@ &fsim0 {
 
 	fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
 	fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
-	cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
 
 	cfam@0,0 {
 		reg = <0 0>;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 17/35] ARM: dts: aspeed: Everest: Add I2C components
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (15 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 16/35] ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 18/35] ARM: dts: Aspeed: Everest: Add max31785 fan controller device Eddie James
                   ` (18 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: PriyangaRamasamy <priyanga24@in.ibm.com>

Tested on simics. Able to bound the devices with i2c driver.

Signed-off-by: PriyangaRamasamy <priyanga24@in.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 408 +++++++++++++++++++
 1 file changed, 408 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 6bd876657bb8..ab7be4d511a5 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -45,6 +45,25 @@ aliases {
 		i2c416 = &cfam3_i2c16;
 		i2c417 = &cfam3_i2c17;
 
+		i2c16 = &i2c4mux0chn0;
+		i2c17 = &i2c4mux0chn1;
+		i2c18 = &i2c4mux0chn2;
+		i2c19 = &i2c5mux0chn0;
+		i2c20 = &i2c5mux0chn1;
+		i2c21 = &i2c5mux0chn2;
+		i2c22 = &i2c5mux0chn3;
+		i2c23 = &i2c6mux0chn0;
+		i2c24 = &i2c6mux0chn1;
+		i2c25 = &i2c6mux0chn2;
+		i2c26 = &i2c6mux0chn3;
+		i2c27 = &i2c14mux0chn0;
+		i2c28 = &i2c14mux0chn1;
+		i2c29 = &i2c14mux0chn2;
+		i2c30 = &i2c14mux1chn0;
+		i2c31 = &i2c14mux1chn1;
+		i2c32 = &i2c14mux1chn2;
+		i2c33 = &i2c14mux1chn3;
+
 		serial4 = &uart5;
 
 		spi10 = &cfam0_spi0;
@@ -105,6 +124,395 @@ vga_memory: region@bf000000 {
 	};
 };
 
+&i2c0 {
+	status = "okay";
+
+	eeprom@51 {
+		compatible = "atmel,24c64";
+		reg = <0x51>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+
+	eeprom@54 {
+		compatible = "atmel,24c128";
+		reg = <0x54>;
+	};
+};
+
+&i2c4 {
+	status = "okay";
+
+	i2c-switch@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c4mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+		};
+
+		i2c4mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c4mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&i2c5 {
+	status = "okay";
+
+	i2c-switch@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c5mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c5mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+
+		i2c5mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+		};
+
+		i2c5mux0chn3: i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+			eeprom@53 {
+				compatible = "atmel,24c64";
+				reg = <0x53>;
+			};
+		};
+	};
+};
+
+&i2c6 {
+	status = "okay";
+
+	i2c-switch@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c6mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c6mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+		};
+
+		i2c6mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+			eeprom@53 {
+				compatible = "atmel,24c64";
+				reg = <0x53>;
+			};
+		};
+
+		i2c6mux0chn3: i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&i2c7 {
+	status = "okay";
+};
+
+&i2c8 {
+	status = "okay";
+
+	eeprom@51 {
+		compatible = "atmel,24c64";
+		reg = <0x51>;
+	};
+
+	eeprom@50 {
+		compatible = "atmel,24c128";
+		reg = <0x50>;
+	};
+};
+
+&i2c9 {
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c128";
+		reg = <0x50>;
+	};
+
+	eeprom@51 {
+		compatible = "atmel,24c128";
+		reg = <0x51>;
+	};
+
+	eeprom@53 {
+		compatible = "atmel,24c128";
+		reg = <0x53>;
+	};
+
+	eeprom@52 {
+		compatible = "atmel,24c128";
+		reg = <0x52>;
+	};
+};
+
+&i2c10 {
+	status = "okay";
+
+	eeprom@51 {
+		compatible = "atmel,24c128";
+		reg = <0x51>;
+	};
+
+	eeprom@50 {
+		compatible = "atmel,24c128";
+		reg = <0x50>;
+	};
+
+	eeprom@53 {
+		compatible = "atmel,24c128";
+		reg = <0x53>;
+	};
+
+	eeprom@52 {
+		compatible = "atmel,24c128";
+		reg = <0x52>;
+	};
+};
+
+&i2c11 {
+	status = "okay";
+
+	eeprom@51 {
+		compatible = "atmel,24c128";
+		reg = <0x51>;
+	};
+
+	eeprom@50 {
+		compatible = "atmel,24c128";
+		reg = <0x50>;
+	};
+
+	eeprom@53 {
+		compatible = "atmel,24c128";
+		reg = <0x53>;
+	};
+
+	eeprom@52 {
+		compatible = "atmel,24c128";
+		reg = <0x52>;
+	};
+};
+
+&i2c12 {
+	status = "okay";
+};
+
+&i2c13 {
+	status = "okay";
+
+	eeprom@51 {
+		compatible = "atmel,24c128";
+		reg = <0x51>;
+	};
+
+	eeprom@50 {
+		compatible = "atmel,24c128";
+		reg = <0x50>;
+	};
+
+	eeprom@53 {
+		compatible = "atmel,24c128";
+		reg = <0x53>;
+	};
+
+	eeprom@52 {
+		compatible = "atmel,24c128";
+		reg = <0x52>;
+	};
+};
+
+&i2c14 {
+	status = "okay";
+
+	i2c-switch@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c14mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c14mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			eeprom@51 {
+				compatible = "atmel,24c32";
+				reg = <0x51>;
+			};
+		};
+
+		i2c14mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+			eeprom@50 {
+				compatible = "atmel,24c32";
+				reg = <0x50>;
+			};
+		};
+	};
+
+	i2c-switch@71 {
+		compatible = "nxp,pca9546";
+		reg = <0x71>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c14mux1chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			eeprom@50 {
+				compatible = "atmel,24c32";
+				reg = <0x50>;
+			};
+		};
+
+		i2c14mux1chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			eeprom@50 {
+				compatible = "atmel,24c32";
+				reg = <0x50>;
+			};
+		};
+
+		i2c14mux1chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+			eeprom@50 {
+				compatible = "atmel,24c32";
+				reg = <0x50>;
+			};
+		};
+
+		i2c14mux1chn3: i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+			eeprom@50 {
+				compatible = "atmel,24c32";
+				reg = <0x50>;
+			};
+		};
+	};
+};
+
+&i2c15 {
+	status = "okay";
+};
+
 &ehci1 {
 	status = "okay";
 };
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 18/35] ARM: dts: Aspeed: Everest: Add max31785 fan controller device
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (16 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 17/35] ARM: dts: aspeed: Everest: Add I2C components Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 19/35] ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines Eddie James
                   ` (17 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Matthew Barth <msbarth@us.ibm.com>

Add the max31785 configuration at address 0x52 on i2c14 behind mux0
channel 3.

Signed-off-by: Matthew Barth <msbarth@us.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 71 ++++++++++++++++++--
 1 file changed, 67 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index ab7be4d511a5..cc45608b0cbc 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -59,10 +59,11 @@ aliases {
 		i2c27 = &i2c14mux0chn0;
 		i2c28 = &i2c14mux0chn1;
 		i2c29 = &i2c14mux0chn2;
-		i2c30 = &i2c14mux1chn0;
-		i2c31 = &i2c14mux1chn1;
-		i2c32 = &i2c14mux1chn2;
-		i2c33 = &i2c14mux1chn3;
+		i2c30 = &i2c14mux0chn3;
+		i2c31 = &i2c14mux1chn0;
+		i2c32 = &i2c14mux1chn1;
+		i2c33 = &i2c14mux1chn2;
+		i2c34 = &i2c14mux1chn3;
 
 		serial4 = &uart5;
 
@@ -457,6 +458,68 @@ eeprom@50 {
 				reg = <0x50>;
 			};
 		};
+
+		i2c14mux0chn3: i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+			max31785@52 {
+				compatible = "maxim,max31785a";
+				reg = <0x52>;
+
+				fan@0 {
+					compatible = "pmbus-fan";
+					reg = <0>;
+					tach-pulses = <2>;
+					maxim,fan-rotor-input = "tach";
+					maxim,fan-pwm-freq = <25000>;
+					maxim,fan-dual-tach;
+					maxim,fan-no-watchdog;
+					maxim,fan-no-fault-ramp;
+					maxim,fan-ramp = <2>;
+					maxim,fan-fault-pin-mon;
+				};
+
+				fan@1 {
+					compatible = "pmbus-fan";
+					reg = <1>;
+					tach-pulses = <2>;
+					maxim,fan-rotor-input = "tach";
+					maxim,fan-pwm-freq = <25000>;
+					maxim,fan-dual-tach;
+					maxim,fan-no-watchdog;
+					maxim,fan-no-fault-ramp;
+					maxim,fan-ramp = <2>;
+					maxim,fan-fault-pin-mon;
+				};
+
+				fan@2 {
+					compatible = "pmbus-fan";
+					reg = <2>;
+					tach-pulses = <2>;
+					maxim,fan-rotor-input = "tach";
+					maxim,fan-pwm-freq = <25000>;
+					maxim,fan-dual-tach;
+					maxim,fan-no-watchdog;
+					maxim,fan-no-fault-ramp;
+					maxim,fan-ramp = <2>;
+					maxim,fan-fault-pin-mon;
+				};
+
+				fan@3 {
+					compatible = "pmbus-fan";
+					reg = <3>;
+					tach-pulses = <2>;
+					maxim,fan-rotor-input = "tach";
+					maxim,fan-pwm-freq = <25000>;
+					maxim,fan-dual-tach;
+					maxim,fan-no-watchdog;
+					maxim,fan-no-fault-ramp;
+					maxim,fan-ramp = <2>;
+					maxim,fan-fault-pin-mon;
+				};
+			};
+		};
 	};
 
 	i2c-switch@71 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 19/35] ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (17 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 18/35] ARM: dts: Aspeed: Everest: Add max31785 fan controller device Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 20/35] ARM: dts: Aspeed: Everest: Add pca9552 fan presence Eddie James
                   ` (16 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

Add additional CFAMs and re-number the existing engines for the
extra processors present on the Everest system.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 648 ++++++++++++++++++-
 1 file changed, 644 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index cc45608b0cbc..de2606b416e6 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -44,6 +44,38 @@ aliases {
 		i2c415 = &cfam3_i2c15;
 		i2c416 = &cfam3_i2c16;
 		i2c417 = &cfam3_i2c17;
+		i2c500 = &cfam4_i2c0;
+		i2c501 = &cfam4_i2c1;
+		i2c510 = &cfam4_i2c10;
+		i2c511 = &cfam4_i2c11;
+		i2c512 = &cfam4_i2c12;
+		i2c513 = &cfam4_i2c13;
+		i2c514 = &cfam4_i2c14;
+		i2c515 = &cfam4_i2c15;
+		i2c602 = &cfam5_i2c2;
+		i2c603 = &cfam5_i2c3;
+		i2c610 = &cfam5_i2c10;
+		i2c611 = &cfam5_i2c11;
+		i2c614 = &cfam5_i2c14;
+		i2c615 = &cfam5_i2c15;
+		i2c616 = &cfam5_i2c16;
+		i2c617 = &cfam5_i2c17;
+		i2c700 = &cfam6_i2c0;
+		i2c701 = &cfam6_i2c1;
+		i2c710 = &cfam6_i2c10;
+		i2c711 = &cfam6_i2c11;
+		i2c712 = &cfam6_i2c12;
+		i2c713 = &cfam6_i2c13;
+		i2c714 = &cfam6_i2c14;
+		i2c715 = &cfam6_i2c15;
+		i2c802 = &cfam7_i2c2;
+		i2c803 = &cfam7_i2c3;
+		i2c810 = &cfam7_i2c10;
+		i2c811 = &cfam7_i2c11;
+		i2c814 = &cfam7_i2c14;
+		i2c815 = &cfam7_i2c15;
+		i2c816 = &cfam7_i2c16;
+		i2c817 = &cfam7_i2c17;
 
 		i2c16 = &i2c4mux0chn0;
 		i2c17 = &i2c4mux0chn1;
@@ -83,6 +115,22 @@ aliases {
 		spi41 = &cfam3_spi1;
 		spi42 = &cfam3_spi2;
 		spi43 = &cfam3_spi3;
+		spi50 = &cfam4_spi0;
+		spi51 = &cfam4_spi1;
+		spi52 = &cfam4_spi2;
+		spi53 = &cfam4_spi3;
+		spi60 = &cfam5_spi0;
+		spi61 = &cfam5_spi1;
+		spi62 = &cfam5_spi2;
+		spi63 = &cfam5_spi3;
+		spi70 = &cfam6_spi0;
+		spi71 = &cfam6_spi1;
+		spi72 = &cfam6_spi2;
+		spi73 = &cfam6_spi3;
+		spi80 = &cfam7_spi0;
+		spi81 = &cfam7_spi1;
+		spi82 = &cfam7_spi2;
+		spi83 = &cfam7_spi3;
 	};
 
 	chosen {
@@ -604,7 +652,7 @@ &fsim0 {
 	 */
 	cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
 
-	cfam@0,0 {
+	cfam@0,0 {	/* DCM0_C0 */
 		reg = <0 0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -748,7 +796,7 @@ fsi_hub0: hub@3400 {
 };
 
 &fsi_hub0 {
-	cfam@1,0 {
+	cfam@1,0 { /* DCM0_C1 */
 		reg = <1 0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -892,7 +940,7 @@ fsi_hub1: hub@3400 {
 		};
 	};
 
-	cfam@2,0 {
+	cfam@2,0 { /* DCM1_C0 */
 		reg = <2 0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -1036,7 +1084,7 @@ fsi_hub2: hub@3400 {
 		};
 	};
 
-	cfam@3,0 {
+	cfam@3,0 { /* DCM1_C1 */
 		reg = <3 0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -1179,6 +1227,582 @@ fsi_hub3: hub@3400 {
 			no-scan-on-init;
 		};
 	};
+
+	cfam@4,0 { /* DCM2_C0 */
+		reg = <4 0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		chip-id = <4>;
+
+		scom@1000 {
+			compatible = "ibm,fsi2pib";
+			reg = <0x1000 0x400>;
+		};
+
+		i2c@1800 {
+			compatible = "ibm,fsi-i2c-master";
+			reg = <0x1800 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam4_i2c0: i2c-bus@0 {
+				reg = <0>;	/* OM01 */
+			};
+
+			cfam4_i2c1: i2c-bus@1 {
+				reg = <1>;	/* OM23 */
+			};
+
+			cfam4_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam4_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam4_i2c12: i2c-bus@c {
+				reg = <12>;	/* OP4A */
+			};
+
+			cfam4_i2c13: i2c-bus@d {
+				reg = <13>;	/* OP4B */
+			};
+
+			cfam4_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam4_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
+		};
+
+		fsi2spi@1c00 {
+			compatible = "ibm,fsi2spi";
+			reg = <0x1c00 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam4_spi0: spi@0 {
+				reg = <0x0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam4_spi1: spi@20 {
+				reg = <0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam4_spi2: spi@40 {
+				reg = <0x40>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam4_spi3: spi@60 {
+				reg = <0x60>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+		};
+
+		sbefifo@2400 {
+			compatible = "ibm,p9-sbefifo";
+			reg = <0x2400 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			fsi_occ4: occ {
+				compatible = "ibm,p10-occ";
+			};
+		};
+
+		fsi_hub4: hub@3400 {
+			compatible = "fsi-master-hub";
+			reg = <0x3400 0x400>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			no-scan-on-init;
+		};
+	};
+
+	cfam@5,0 { /* DCM2_C1 */
+		reg = <5 0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		chip-id = <5>;
+
+		scom@1000 {
+			compatible = "ibm,fsi2pib";
+			reg = <0x1000 0x400>;
+		};
+
+		i2c@1800 {
+			compatible = "ibm,fsi-i2c-master";
+			reg = <0x1800 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam5_i2c2: i2c-bus@2 {
+				reg = <2>;	/* OM45 */
+			};
+
+			cfam5_i2c3: i2c-bus@3 {
+				reg = <3>;	/* OM67 */
+			};
+
+			cfam5_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam5_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam5_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam5_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
+
+			cfam5_i2c16: i2c-bus@10 {
+				reg = <16>;	/* OP6A */
+			};
+
+			cfam5_i2c17: i2c-bus@11 {
+				reg = <17>;	/* OP6B */
+			};
+		};
+
+		fsi2spi@1c00 {
+			compatible = "ibm,fsi2spi";
+			reg = <0x1c00 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam5_spi0: spi@0 {
+				reg = <0x0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam5_spi1: spi@20 {
+				reg = <0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam5_spi2: spi@40 {
+				reg = <0x40>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam5_spi3: spi@60 {
+				reg = <0x60>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+		};
+
+		sbefifo@2400 {
+			compatible = "ibm,p9-sbefifo";
+			reg = <0x2400 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			fsi_occ5: occ {
+				compatible = "ibm,p10-occ";
+			};
+		};
+
+		fsi_hub5: hub@3400 {
+			compatible = "fsi-master-hub";
+			reg = <0x3400 0x400>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			no-scan-on-init;
+		};
+	};
+
+	cfam@6,0 { /* DCM3_C0 */
+		reg = <6 0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		chip-id = <6>;
+
+		scom@1000 {
+			compatible = "ibm,fsi2pib";
+			reg = <0x1000 0x400>;
+		};
+
+		i2c@1800 {
+			compatible = "ibm,fsi-i2c-master";
+			reg = <0x1800 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam6_i2c0: i2c-bus@0 {
+				reg = <0>;	/* OM01 */
+			};
+
+			cfam6_i2c1: i2c-bus@1 {
+				reg = <1>;	/* OM23 */
+			};
+
+			cfam6_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam6_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam6_i2c12: i2c-bus@c {
+				reg = <12>;	/* OP4A */
+			};
+
+			cfam6_i2c13: i2c-bus@d {
+				reg = <13>;	/* OP4B */
+			};
+
+			cfam6_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam6_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
+		};
+
+		fsi2spi@1c00 {
+			compatible = "ibm,fsi2spi";
+			reg = <0x1c00 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam6_spi0: spi@0 {
+				reg = <0x0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam6_spi1: spi@20 {
+				reg = <0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam6_spi2: spi@40 {
+				reg = <0x40>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam6_spi3: spi@60 {
+				reg = <0x60>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+		};
+
+		sbefifo@2400 {
+			compatible = "ibm,p9-sbefifo";
+			reg = <0x2400 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			fsi_occ6: occ {
+				compatible = "ibm,p10-occ";
+			};
+		};
+
+		fsi_hub6: hub@3400 {
+			compatible = "fsi-master-hub";
+			reg = <0x3400 0x400>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			no-scan-on-init;
+		};
+	};
+
+	cfam@7,0 { /* DCM3_C1 */
+		reg = <7 0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		chip-id = <7>;
+
+		scom@1000 {
+			compatible = "ibm,fsi2pib";
+			reg = <0x1000 0x400>;
+		};
+
+		i2c@1800 {
+			compatible = "ibm,fsi-i2c-master";
+			reg = <0x1800 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam7_i2c2: i2c-bus@2 {
+				reg = <2>;	/* OM45 */
+			};
+
+			cfam7_i2c3: i2c-bus@3 {
+				reg = <3>;	/* OM67 */
+			};
+
+			cfam7_i2c10: i2c-bus@a {
+				reg = <10>;	/* OP3A */
+			};
+
+			cfam7_i2c11: i2c-bus@b {
+				reg = <11>;	/* OP3B */
+			};
+
+			cfam7_i2c14: i2c-bus@e {
+				reg = <14>;	/* OP5A */
+			};
+
+			cfam7_i2c15: i2c-bus@f {
+				reg = <15>;	/* OP5B */
+			};
+
+			cfam7_i2c16: i2c-bus@10 {
+				reg = <16>;	/* OP6A */
+			};
+
+			cfam7_i2c17: i2c-bus@11 {
+				reg = <17>;	/* OP6B */
+			};
+		};
+
+		fsi2spi@1c00 {
+			compatible = "ibm,fsi2spi";
+			reg = <0x1c00 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cfam7_spi0: spi@0 {
+				reg = <0x0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam7_spi1: spi@20 {
+				reg = <0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam7_spi2: spi@40 {
+				reg = <0x40>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+
+			cfam7_spi3: spi@60 {
+				reg = <0x60>;
+				compatible = "ibm,fsi2spi-restricted";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				eeprom@0 {
+					at25,byte-len = <0x80000>;
+					at25,addr-mode = <4>;
+					at25,page-size = <256>;
+
+					compatible = "atmel,at25";
+					reg = <0>;
+					spi-max-frequency = <1000000>;
+				};
+			};
+		};
+
+		sbefifo@2400 {
+			compatible = "ibm,p9-sbefifo";
+			reg = <0x2400 0x400>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			fsi_occ7: occ {
+				compatible = "ibm,p10-occ";
+			};
+		};
+
+		fsi_hub7: hub@3400 {
+			compatible = "fsi-master-hub";
+			reg = <0x3400 0x400>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			no-scan-on-init;
+		};
+	};
 };
 
 /* Legacy OCC numbering (to get rid of when userspace is fixed) */
@@ -1198,6 +1822,22 @@ &fsi_occ3 {
 	reg = <4>;
 };
 
+&fsi_occ4 {
+	reg = <5>;
+};
+
+&fsi_occ5 {
+	reg = <6>;
+};
+
+&fsi_occ6 {
+	reg = <7>;
+};
+
+&fsi_occ7 {
+	reg = <8>;
+};
+
 &ibt {
 	status = "okay";
 };
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 20/35] ARM: dts: Aspeed: Everest: Add pca9552 fan presence
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (18 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 19/35] ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 21/35] ARM: dts: aspeed: everest: Add power supply i2c devices Eddie James
                   ` (15 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Matthew Barth <msbarth@us.ibm.com>

Add the pca9552 at address 0x61 on i2c14 behind mux0 channel 3 with the
4 GPIO fan presence inputs.

Signed-off-by: Matthew Barth <msbarth@us.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 128 +++++++++++++++++++
 1 file changed, 128 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index de2606b416e6..d7f23b74dd4b 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -171,6 +171,37 @@ vga_memory: region@bf000000 {
 			reg = <0xbf000000 0x01000000>; /* 16M */
 		};
 	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <1000>;
+
+		fan0-presence {
+			label = "fan0-presence";
+			gpios = <&pca0 15 GPIO_ACTIVE_LOW>;
+			linux,code = <15>;
+		};
+
+		fan1-presence {
+			label = "fan1-presence";
+			gpios = <&pca0 14 GPIO_ACTIVE_LOW>;
+			linux,code = <14>;
+		};
+
+		fan2-presence {
+			label = "fan2-presence";
+			gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
+			linux,code = <13>;
+		};
+
+		fan3-presence {
+			label = "fan3-presence";
+			gpios = <&pca0 12 GPIO_ACTIVE_LOW>;
+			linux,code = <12>;
+		};
+	};
 };
 
 &i2c0 {
@@ -567,6 +598,103 @@ fan@3 {
 					maxim,fan-fault-pin-mon;
 				};
 			};
+
+			pca0: pca9552@61 {
+				compatible = "nxp,pca9552";
+				reg = <0x61>;
+
+				gpio-controller;
+				#gpio-cells = <2>;
+
+				gpio-line-names =
+					"","","","",
+					"","","","",
+					"","","","",
+					"presence-fan3",
+					"presence-fan2",
+					"presence-fan1",
+					"presence-fan0";
+
+				gpio@0 {
+					reg = <0>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@1 {
+					reg = <1>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@2 {
+					reg = <2>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@3 {
+					reg = <3>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@4 {
+					reg = <4>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@5 {
+					reg = <5>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@6 {
+					reg = <6>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@7 {
+					reg = <7>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@8 {
+					reg = <8>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@9 {
+					reg = <9>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@10 {
+					reg = <10>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@11 {
+					reg = <11>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@12 {
+					reg = <12>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@13 {
+					reg = <13>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@14 {
+					reg = <14>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+
+				gpio@15 {
+					reg = <15>;
+					type = <PCA955X_TYPE_GPIO>;
+				};
+			};
 		};
 	};
 
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 21/35] ARM: dts: aspeed: everest: Add power supply i2c devices
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (19 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 20/35] ARM: dts: Aspeed: Everest: Add pca9552 fan presence Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 22/35] ARM: dts: aspeed: everest: Add UCD90320 power sequencer Eddie James
                   ` (14 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Brandon Wyman <bjwyman@gmail.com>

Add the i2c/pmbus power supply devices to the everest device tree.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index d7f23b74dd4b..04c96a3fe506 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -228,6 +228,26 @@ eeprom@54 {
 		compatible = "atmel,24c128";
 		reg = <0x54>;
 	};
+
+	power-supply@68 {
+		compatible = "ibm,cffps";
+		reg = <0x68>;
+	};
+
+	power-supply@69 {
+		compatible = "ibm,cffps";
+		reg = <0x69>;
+	};
+
+	power-supply@6a {
+		compatible = "ibm,cffps";
+		reg = <0x6a>;
+	};
+
+	power-supply@6b {
+		compatible = "ibm,cffps";
+		reg = <0x6b>;
+	};
 };
 
 &i2c4 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 22/35] ARM: dts: aspeed: everest: Add UCD90320 power sequencer
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (20 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 21/35] ARM: dts: aspeed: everest: Add power supply i2c devices Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 23/35] ARM: dts: aspeed: everest: GPIOs support Eddie James
                   ` (13 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Jim Wright <jlwright@us.ibm.com>

Add UCD90320 chip to Everest device tree.

Signed-off-by: Jim Wright <jlwright@us.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 04c96a3fe506..9e77bbb3e4d1 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -406,6 +406,11 @@ &i2c7 {
 &i2c8 {
 	status = "okay";
 
+	ucd90320@11 {
+		compatible = "ti,ucd90320";
+		reg = <0x11>;
+	};
+
 	eeprom@51 {
 		compatible = "atmel,24c64";
 		reg = <0x51>;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 23/35] ARM: dts: aspeed: everest: GPIOs support
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (21 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 22/35] ARM: dts: aspeed: everest: Add UCD90320 power sequencer Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 24/35] ARM: dts: Aspeed: Everest: Add RTC Eddie James
                   ` (12 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Alpana Kumari <alpankum@in.ibm.com>

This commit adds support for-
- Presence GPIOs
- I2C control GPIOs
- Op-panel GPIOs (ex PHR)

Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 297 +++++++++++++++++++
 1 file changed, 297 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 9e77bbb3e4d1..18a3d65fb67d 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -204,6 +204,37 @@ fan3-presence {
 	};
 };
 
+&gpio0 {
+	gpio-line-names =
+	/*A0-A7*/	"","","","","","","","",
+	/*B0-B7*/	"USERSPACE_RSTIND_BUFF","","","","","","","",
+	/*C0-C7*/	"","","","","","","","",
+	/*D0-D7*/	"","","","","","","","",
+	/*E0-E7*/	"","","","","","","","",
+	/*F0-F7*/	"PIN_HOLE_RESET_IN_N","","",
+				"PIN_HOLE_RESET_OUT_N","","","","",
+	/*G0-G7*/	"","","","","","","","",
+	/*H0-H7*/	"","","","","","","","",
+	/*I0-I7*/	"","","","","","","","",
+	/*J0-J7*/	"","","","","","","","",
+	/*K0-K7*/	"","","","","","","","",
+	/*L0-L7*/	"","","","","","","","",
+	/*M0-M7*/	"","","","","","","","",
+	/*N0-N7*/	"","","","","","","","",
+	/*O0-O7*/	"","","","","","","","",
+	/*P0-P7*/	"","","","","","","","",
+	/*Q0-Q7*/	"","","","","","","","",
+	/*R0-R7*/	"","","","","","I2C_FLASH_MICRO_N","","",
+	/*S0-S7*/	"","","","","","","","",
+	/*T0-T7*/	"","","","","","","","",
+	/*U0-U7*/	"","","","","","","","",
+	/*V0-V7*/	"","BMC_3RESTART_ATTEMPT_P","","","","","","",
+	/*W0-W7*/	"","","","","","","","",
+	/*X0-X7*/	"","","","","","","","",
+	/*Y0-Y7*/	"","","","","","","","",
+	/*Z0-Z7*/   "","","","","","","","";
+};
+
 &i2c0 {
 	status = "okay";
 
@@ -211,10 +242,276 @@ eeprom@51 {
 		compatible = "atmel,24c64";
 		reg = <0x51>;
 	};
+
+	pca1: pca9552@62 {
+		compatible = "nxp,pca9552";
+		reg = <0x62>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+			"presence-ps0",
+			"presence-ps1",
+			"presence-ps2",
+			"presence-ps3",
+			"presence-pdb",
+			"presence-tpm",
+			"", "",
+			"presence-cp0",
+			"presence-cp1",
+			"presence-cp2",
+			"presence-cp3",
+			"presence-dasd",
+			"presence-lcd-op",
+			"presence-base-op",
+			"";
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@01 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@12 {
+			reg = <12>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@13 {
+			reg = <13>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@14 {
+			reg = <14>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@15 {
+			reg = <15>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+	};
 };
 
 &i2c1 {
 	status = "okay";
+
+	pca2: pca9552@61 {
+		compatible = "nxp,pca9552";
+		reg = <0x61>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+			"presence-cable-card1",
+			"presence-cable-card2",
+			"presence-cable-card3",
+			"presence-cable-card4",
+			"presence-cable-card5",
+			"expander-cable-card1",
+			"expander-cable-card2",
+			"expander-cable-card3",
+			"expander-cable-card4",
+			"expander-cable-card5";
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+	};
+
+	pca3: pca9552@62 {
+		compatible = "nxp,pca9552";
+		reg = <0x62>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+			"presence-cable-card6",
+			"presence-cable-card7",
+			"presence-cable-card8",
+			"presence-cable-card9",
+			"presence-cable-card10",
+			"presence-cable-card11",
+			"expander-cable-card6",
+			"expander-cable-card7",
+			"expander-cable-card8",
+			"expander-cable-card9",
+			"expander-cable-card10",
+			"expander-cable-card11";
+
+		gpio@0 {
+			reg = <0>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@1 {
+			reg = <1>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@2 {
+			reg = <2>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@3 {
+			reg = <3>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@4 {
+			reg = <4>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@5 {
+			reg = <5>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@6 {
+			reg = <6>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@7 {
+			reg = <7>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@8 {
+			reg = <8>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@9 {
+			reg = <9>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@10 {
+			reg = <10>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+		gpio@11 {
+			reg = <11>;
+			type = <PCA955X_TYPE_GPIO>;
+		};
+
+	};
+
 };
 
 &i2c2 {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 24/35] ARM: dts: Aspeed: Everest: Add RTC
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (22 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 23/35] ARM: dts: aspeed: everest: GPIOs support Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 25/35] ARM: dts: aspeed: rainier: Support pass 2 planar Eddie James
                   ` (11 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

Add the RTC at the appropriate I2C bus and address.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 18a3d65fb67d..f33c22f824cd 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -708,6 +708,11 @@ ucd90320@11 {
 		reg = <0x11>;
 	};
 
+	rtc@32 {
+		compatible = "epson,rx8900";
+		reg = <0x32>;
+	};
+
 	eeprom@51 {
 		compatible = "atmel,24c64";
 		reg = <0x51>;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 25/35] ARM: dts: aspeed: rainier: Support pass 2 planar
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (23 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 24/35] ARM: dts: Aspeed: Everest: Add RTC Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 26/35] fsi: scom: Handle FSI2PIB timeout Eddie James
                   ` (10 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Alpana Kumari <alpankum@in.ibm.com>

Add device trees for the second version of the Rainier system planar.
Include the original dts and make the necessary changes.

Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>
---
 arch/arm/boot/dts/Makefile                    |   2 +
 .../boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts | 198 ++++++++++++++++++
 .../boot/dts/aspeed-bmc-ibm-rainier-v2.dts    | 198 ++++++++++++++++++
 3 files changed, 398 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-v2.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index c57729f40185..7b24be9cf961 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1397,7 +1397,9 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
 	aspeed-bmc-facebook-yosemitev2.dtb \
 	aspeed-bmc-ibm-everest.dtb \
 	aspeed-bmc-ibm-rainier.dtb \
+	aspeed-bmc-ibm-rainier-v2.dtb \
 	aspeed-bmc-ibm-rainier-4u.dtb \
+	aspeed-bmc-ibm-rainier-4u-v2.dtb \
 	aspeed-bmc-intel-s2600wf.dtb \
 	aspeed-bmc-inspur-fp5280g2.dtb \
 	aspeed-bmc-lenovo-hr630.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts
new file mode 100644
index 000000000000..6712b2e7e7b5
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2021 IBM Corp.
+/dts-v1/;
+
+#include "aspeed-bmc-ibm-rainier-4u.dts"
+
+/ {
+	i2c20 = &i2c4mux0chn0;
+	i2c21 = &i2c4mux0chn1;
+	i2c22 = &i2c4mux0chn2;
+	i2c23 = &i2c5mux0chn0;
+	i2c24 = &i2c5mux0chn1;
+	i2c25 = &i2c6mux0chn0;
+	i2c26 = &i2c6mux0chn1;
+	i2c27 = &i2c6mux0chn2;
+	i2c28 = &i2c6mux0chn3;
+	i2c29 = &i2c11mux0chn0;
+	i2c30 = &i2c11mux0chn1;
+};
+
+&i2c4 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+	/delete-node/ eeprom@52;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c4mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c4mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+
+		i2c4mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+	};
+};
+
+&i2c5 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c5mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c5mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&i2c6 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+	/delete-node/ eeprom@52;
+	/delete-node/ eeprom@53;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c6mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@53 {
+				compatible = "atmel,24c64";
+				reg = <0x53>;
+			};
+		};
+
+		i2c6mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+		};
+
+		i2c6mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c6mux0chn3: i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&i2c11 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c11mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c11mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-v2.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-v2.dts
new file mode 100644
index 000000000000..24cf12150919
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-v2.dts
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2021 IBM Corp.
+/dts-v1/;
+
+#include "aspeed-bmc-ibm-rainier.dts"
+
+/ {
+	i2c20 = &i2c4mux0chn0;
+	i2c21 = &i2c4mux0chn1;
+	i2c22 = &i2c4mux0chn2;
+	i2c23 = &i2c5mux0chn0;
+	i2c24 = &i2c5mux0chn1;
+	i2c25 = &i2c6mux0chn0;
+	i2c26 = &i2c6mux0chn1;
+	i2c27 = &i2c6mux0chn2;
+	i2c28 = &i2c6mux0chn3;
+	i2c29 = &i2c11mux0chn0;
+	i2c30 = &i2c11mux0chn1;
+};
+
+&i2c4 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+	/delete-node/ eeprom@52;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c4mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c4mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+
+		i2c4mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+	};
+};
+
+&i2c5 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c5mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c5mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&i2c6 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+	/delete-node/ eeprom@52;
+	/delete-node/ eeprom@53;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c6mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@53 {
+				compatible = "atmel,24c64";
+				reg = <0x53>;
+			};
+		};
+
+		i2c6mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@52 {
+				compatible = "atmel,24c64";
+				reg = <0x52>;
+			};
+		};
+
+		i2c6mux0chn2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c6mux0chn3: i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&i2c11 {
+	/delete-node/ eeprom@50;
+	/delete-node/ eeprom@51;
+
+	pca9546@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+		i2c-mux-idle-disconnect;
+
+		i2c11mux0chn0: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+			};
+		};
+
+		i2c11mux0chn1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@51 {
+				compatible = "atmel,24c64";
+				reg = <0x51>;
+			};
+		};
+	};
+};
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 26/35] fsi: scom: Handle FSI2PIB timeout
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (24 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 25/35] ARM: dts: aspeed: rainier: Support pass 2 planar Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-12  0:20   ` Joel Stanley
  2021-03-08 22:54 ` [PATCH linux dev-5.10 27/35] net/ncsi: Avoid channel_monitor hrtimer deadlock Eddie James
                   ` (9 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Joel Stanley <joel@jms.id.au>

When the scom engine indicates a FSI2PIB timeout we can recover by
writing any value to the the reset register.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/fsi/fsi-scom.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c
index b45bfab7b7f5..2356a80f7f04 100644
--- a/drivers/fsi/fsi-scom.c
+++ b/drivers/fsi/fsi-scom.c
@@ -38,6 +38,15 @@
 #define SCOM_STATUS_PIB_RESP_MASK	0x00007000
 #define SCOM_STATUS_PIB_RESP_SHIFT	12
 
+/* Values the SCOM_STATUS_PIB_RESP_MASK can take */
+#define SCOM_PIB_ERR_XSCOM_BLOCKED	0x00004000
+#define SCOM_PIB_ERR_CHIPLET_OFFLINE	0x00002000
+#define SCOM_PIB_ERR_PARTIAL_GOOD	0x00006000
+#define SCOM_PIB_ERR_INVALID_ADDR	0x00001000
+#define SCOM_PIB_ERR_CLOCK		0x00005000
+#define SCOM_PIB_ERR_HANDSHAKE		0x00003000
+#define SCOM_PIB_ERR_TIMEOUT		0x00007000
+
 #define SCOM_STATUS_ANY_ERR		(SCOM_STATUS_PROTECTION | \
 					 SCOM_STATUS_PARITY |	  \
 					 SCOM_STATUS_PIB_ABORT | \
@@ -250,6 +259,15 @@ static int handle_fsi2pib_status(struct scom_device *scom, uint32_t status)
 	/* Return -EBUSY on PIB abort to force a retry */
 	if (status & SCOM_STATUS_PIB_ABORT)
 		return -EBUSY;
+
+	if (status & SCOM_PIB_ERR_TIMEOUT) {
+		dev_dbg(&scom->dev, "PIB timeout, recovering\n");
+		fsi_device_write(scom->fsi_dev, SCOM_FSI2PIB_RESET_REG,
+				 &dummy, sizeof(uint32_t));
+		/* Return -EBUSY to force a retry */
+		return -EBUSY;
+	}
+
 	return 0;
 }
 
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 27/35] net/ncsi: Avoid channel_monitor hrtimer deadlock
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (25 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 26/35] fsi: scom: Handle FSI2PIB timeout Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-12  0:35   ` Joel Stanley
  2021-03-08 22:54 ` [PATCH linux dev-5.10 28/35] ftgmac100: Restart MAC HW once Eddie James
                   ` (8 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Milton Miller <miltonm@us.ibm.com>

Calling ncsi_stop_channel_monitor from channel_monitor is a guaranteed
deadlock on SMP because stop calls del_timer_sync on the timer that
inoked channel_monitor as its timer function.

Recognise the inherent race of marking the monitor disabled before
deleting the timer by just returning if enable was cleared.  After
a timeout (the default case -- reset to START when response recieved)
just mark the monitor.enabled false.

If the channel has an entrie on the channel_queue list, or if the the
state is not ACTIVE or INACTIVE, then warn and mark the timer stopped
and don't restart, as the locking is broken somehow.

Fixes: 0795fb2021f0 ("net/ncsi: Stop monitor if channel times out or is inactive")
Signed-off-by: Milton Miller <miltonm@us.ibm.com>
---
 net/ncsi/ncsi-manage.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/net/ncsi/ncsi-manage.c b/net/ncsi/ncsi-manage.c
index a9cb355324d1..5a2beaf874c7 100644
--- a/net/ncsi/ncsi-manage.c
+++ b/net/ncsi/ncsi-manage.c
@@ -105,13 +105,20 @@ static void ncsi_channel_monitor(struct timer_list *t)
 	monitor_state = nc->monitor.state;
 	spin_unlock_irqrestore(&nc->lock, flags);
 
-	if (!enabled || chained) {
-		ncsi_stop_channel_monitor(nc);
-		return;
+	if (!enabled)
+		return;		/* expected race disabling timer */
+	if (WARN_ON_ONCE(chained)) {
+		goto bad_state;
 	}
 	if (state != NCSI_CHANNEL_INACTIVE &&
 	    state != NCSI_CHANNEL_ACTIVE) {
-		ncsi_stop_channel_monitor(nc);
+bad_state:
+		netdev_warn(ndp->ndev.dev,
+			    "Bad NCSI monitor state channel %d 0x%x %s queue\n",
+			    nc->id, state, chained ? "on" : "off");
+		spin_lock_irqsave(&nc->lock, flags);
+		nc->monitor.enabled = false;
+		spin_unlock_irqrestore(&nc->lock, flags);
 		return;
 	}
 
@@ -136,10 +143,9 @@ static void ncsi_channel_monitor(struct timer_list *t)
 		ncsi_report_link(ndp, true);
 		ndp->flags |= NCSI_DEV_RESHUFFLE;
 
-		ncsi_stop_channel_monitor(nc);
-
 		ncm = &nc->modes[NCSI_MODE_LINK];
 		spin_lock_irqsave(&nc->lock, flags);
+		nc->monitor.enabled = false;
 		nc->state = NCSI_CHANNEL_INVISIBLE;
 		ncm->data[2] &= ~0x1;
 		spin_unlock_irqrestore(&nc->lock, flags);
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 28/35] ftgmac100: Restart MAC HW once
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (26 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 27/35] net/ncsi: Avoid channel_monitor hrtimer deadlock Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 29/35] hwmon: (pmbus) Add a PMBUS_NO_CAPABILITY platform data flag Eddie James
                   ` (7 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Dylan Hung <dylan_hung@aspeedtech.com>

The interrupt handler may set the flag to reset the mac in the future,
but that flag is not cleared once the reset has occured.

Fixes: 10cbd6407609 ("ftgmac100: Rework NAPI & interrupts handling")
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201019085717.32413-5-dylan_hung@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/net/ethernet/faraday/ftgmac100.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c
index e04bb9d6a9af..1c7912a94e36 100644
--- a/drivers/net/ethernet/faraday/ftgmac100.c
+++ b/drivers/net/ethernet/faraday/ftgmac100.c
@@ -1318,6 +1318,7 @@ static int ftgmac100_poll(struct napi_struct *napi, int budget)
 	 */
 	if (unlikely(priv->need_mac_restart)) {
 		ftgmac100_start_hw(priv);
+		priv->need_mac_restart = false;
 
 		/* Re-enable "bad" interrupts */
 		iowrite32(FTGMAC100_INT_BAD,
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 29/35] hwmon: (pmbus) Add a PMBUS_NO_CAPABILITY platform data flag
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (27 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 28/35] ftgmac100: Restart MAC HW once Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 30/35] hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag Eddie James
                   ` (6 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

Some PMBus chips don't respond with valid data when reading the
CAPABILITY register. Add a flag that device drivers can set so
that the PMBus core driver doesn't use CAPABILITY to determine it's
behavior.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20201222152640.27749-2-eajames@linux.ibm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 drivers/hwmon/pmbus/pmbus_core.c | 8 +++++---
 include/linux/pmbus.h            | 9 +++++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
index 60ea917936a7..44c1a0a07509 100644
--- a/drivers/hwmon/pmbus/pmbus_core.c
+++ b/drivers/hwmon/pmbus/pmbus_core.c
@@ -2214,9 +2214,11 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
 	}
 
 	/* Enable PEC if the controller supports it */
-	ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
-	if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
-		client->flags |= I2C_CLIENT_PEC;
+	if (!(data->flags & PMBUS_NO_CAPABILITY)) {
+		ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
+		if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
+			client->flags |= I2C_CLIENT_PEC;
+	}
 
 	/*
 	 * Check if the chip is write protected. If it is, we can not clear
diff --git a/include/linux/pmbus.h b/include/linux/pmbus.h
index 1ea5bae708a1..12cbbf305969 100644
--- a/include/linux/pmbus.h
+++ b/include/linux/pmbus.h
@@ -34,6 +34,15 @@
  */
 #define PMBUS_WRITE_PROTECTED	BIT(1)
 
+/*
+ * PMBUS_NO_CAPABILITY
+ *
+ * Some PMBus chips don't respond with valid data when reading the CAPABILITY
+ * register. For such chips, this flag should be set so that the PMBus core
+ * driver doesn't use CAPABILITY to determine it's behavior.
+ */
+#define PMBUS_NO_CAPABILITY			BIT(2)
+
 struct pmbus_platform_data {
 	u32 flags;		/* Device specific flags */
 
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 30/35] hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (28 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 29/35] hwmon: (pmbus) Add a PMBUS_NO_CAPABILITY platform data flag Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-12  0:23   ` Joel Stanley
  2021-03-08 22:54 ` [PATCH linux dev-5.10 31/35] i2c: Allow throttling of transfers to client devices Eddie James
                   ` (5 subsequent siblings)
  35 siblings, 1 reply; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

Several power supplies supported by the IBM CFFPS driver don't
report valid data in the CAPABILITY register. This results in PEC
being enabled when it's not supported by the device, and since
the automatic version detection might fail, disable use of the
CAPABILITY register across the board for this driver.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20201222152640.27749-3-eajames@linux.ibm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 drivers/hwmon/pmbus/ibm-cffps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c
index 2fb7540ee952..f7bb7bebe045 100644
--- a/drivers/hwmon/pmbus/ibm-cffps.c
+++ b/drivers/hwmon/pmbus/ibm-cffps.c
@@ -472,7 +472,7 @@ static struct pmbus_driver_info ibm_cffps_info[] = {
 };
 
 static struct pmbus_platform_data ibm_cffps_pdata = {
-	.flags = PMBUS_SKIP_STATUS_CHECK,
+	.flags = PMBUS_SKIP_STATUS_CHECK | PMBUS_NO_CAPABILITY,
 };
 
 static int ibm_cffps_probe(struct i2c_client *client)
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 31/35] i2c: Allow throttling of transfers to client devices
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (29 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 30/35] hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 32/35] pmbus: (ucd9000) Throttle SMBus transfers to avoid poor behaviour Eddie James
                   ` (4 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

Some devices fail to cope in disastrous ways with the small command
turn-around times enabled by in-kernel device drivers.

Introduce per-client throttling of transfers to avoid these issues.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 drivers/i2c/i2c-core-base.c  |   8 +-
 drivers/i2c/i2c-core-smbus.c | 169 +++++++++++++++++++++++++++++------
 drivers/i2c/i2c-core.h       |  21 +++++
 include/linux/i2c.h          |   5 ++
 4 files changed, 172 insertions(+), 31 deletions(-)

diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 573b5da145d1..fed369bcbc32 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -867,13 +867,17 @@ int i2c_dev_irq_from_resources(const struct resource *resources,
 struct i2c_client *
 i2c_new_client_device(struct i2c_adapter *adap, struct i2c_board_info const *info)
 {
+	struct i2c_client_priv 	*priv;
 	struct i2c_client	*client;
 	int			status;
 
-	client = kzalloc(sizeof *client, GFP_KERNEL);
-	if (!client)
+	priv = kzalloc(sizeof *priv, GFP_KERNEL);
+	if (!priv)
 		return ERR_PTR(-ENOMEM);
 
+	mutex_init(&priv->throttle_lock);
+	client = &priv->client;
+
 	client->adapter = adap;
 
 	client->dev.platform_data = info->platform_data;
diff --git a/drivers/i2c/i2c-core-smbus.c b/drivers/i2c/i2c-core-smbus.c
index f5c9787992e9..1dde58c8a387 100644
--- a/drivers/i2c/i2c-core-smbus.c
+++ b/drivers/i2c/i2c-core-smbus.c
@@ -10,6 +10,7 @@
  * SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> and
  * Jean Delvare <jdelvare@suse.de>
  */
+#include <linux/delay.h>
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/i2c.h>
@@ -21,6 +22,9 @@
 #define CREATE_TRACE_POINTS
 #include <trace/events/smbus.h>
 
+static s32 i2c_smbus_throttle_xfer(const struct i2c_client *client,
+				   char read_write, u8 command, int protocol,
+				   union i2c_smbus_data *data);
 
 /* The SMBus parts */
 
@@ -95,9 +99,9 @@ s32 i2c_smbus_read_byte(const struct i2c_client *client)
 	union i2c_smbus_data data;
 	int status;
 
-	status = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-				I2C_SMBUS_READ, 0,
-				I2C_SMBUS_BYTE, &data);
+	status = i2c_smbus_throttle_xfer(client, I2C_SMBUS_READ, 0,
+					 I2C_SMBUS_BYTE, &data);
+
 	return (status < 0) ? status : data.byte;
 }
 EXPORT_SYMBOL(i2c_smbus_read_byte);
@@ -112,8 +116,8 @@ EXPORT_SYMBOL(i2c_smbus_read_byte);
  */
 s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value)
 {
-	return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-	                      I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
+	return i2c_smbus_throttle_xfer(client, I2C_SMBUS_WRITE, value,
+				       I2C_SMBUS_BYTE, NULL);
 }
 EXPORT_SYMBOL(i2c_smbus_write_byte);
 
@@ -130,9 +134,9 @@ s32 i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
 	union i2c_smbus_data data;
 	int status;
 
-	status = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-				I2C_SMBUS_READ, command,
-				I2C_SMBUS_BYTE_DATA, &data);
+	status = i2c_smbus_throttle_xfer(client, I2C_SMBUS_READ, command,
+					 I2C_SMBUS_BYTE_DATA, &data);
+
 	return (status < 0) ? status : data.byte;
 }
 EXPORT_SYMBOL(i2c_smbus_read_byte_data);
@@ -150,10 +154,10 @@ s32 i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command,
 			      u8 value)
 {
 	union i2c_smbus_data data;
+
 	data.byte = value;
-	return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-			      I2C_SMBUS_WRITE, command,
-			      I2C_SMBUS_BYTE_DATA, &data);
+	return i2c_smbus_throttle_xfer(client, I2C_SMBUS_WRITE, command,
+				       I2C_SMBUS_BYTE_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_byte_data);
 
@@ -170,9 +174,9 @@ s32 i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
 	union i2c_smbus_data data;
 	int status;
 
-	status = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-				I2C_SMBUS_READ, command,
-				I2C_SMBUS_WORD_DATA, &data);
+	status = i2c_smbus_throttle_xfer(client, I2C_SMBUS_READ, command,
+					 I2C_SMBUS_WORD_DATA, &data);
+
 	return (status < 0) ? status : data.word;
 }
 EXPORT_SYMBOL(i2c_smbus_read_word_data);
@@ -190,10 +194,10 @@ s32 i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
 			      u16 value)
 {
 	union i2c_smbus_data data;
+
 	data.word = value;
-	return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-			      I2C_SMBUS_WRITE, command,
-			      I2C_SMBUS_WORD_DATA, &data);
+	return i2c_smbus_throttle_xfer(client, I2C_SMBUS_WRITE, command,
+				       I2C_SMBUS_WORD_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_word_data);
 
@@ -218,9 +222,9 @@ s32 i2c_smbus_read_block_data(const struct i2c_client *client, u8 command,
 	union i2c_smbus_data data;
 	int status;
 
-	status = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-				I2C_SMBUS_READ, command,
-				I2C_SMBUS_BLOCK_DATA, &data);
+	status = i2c_smbus_throttle_xfer(client, I2C_SMBUS_READ, command,
+					 I2C_SMBUS_BLOCK_DATA, &data);
+
 	if (status)
 		return status;
 
@@ -248,9 +252,8 @@ s32 i2c_smbus_write_block_data(const struct i2c_client *client, u8 command,
 		length = I2C_SMBUS_BLOCK_MAX;
 	data.block[0] = length;
 	memcpy(&data.block[1], values, length);
-	return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-			      I2C_SMBUS_WRITE, command,
-			      I2C_SMBUS_BLOCK_DATA, &data);
+	return i2c_smbus_throttle_xfer(client, I2C_SMBUS_WRITE, command,
+				       I2C_SMBUS_BLOCK_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_block_data);
 
@@ -264,9 +267,9 @@ s32 i2c_smbus_read_i2c_block_data(const struct i2c_client *client, u8 command,
 	if (length > I2C_SMBUS_BLOCK_MAX)
 		length = I2C_SMBUS_BLOCK_MAX;
 	data.block[0] = length;
-	status = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-				I2C_SMBUS_READ, command,
-				I2C_SMBUS_I2C_BLOCK_DATA, &data);
+	status = i2c_smbus_throttle_xfer(client, I2C_SMBUS_READ, command,
+					 I2C_SMBUS_I2C_BLOCK_DATA, &data);
+
 	if (status < 0)
 		return status;
 
@@ -284,9 +287,8 @@ s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client, u8 command,
 		length = I2C_SMBUS_BLOCK_MAX;
 	data.block[0] = length;
 	memcpy(data.block + 1, values, length);
-	return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
-			      I2C_SMBUS_WRITE, command,
-			      I2C_SMBUS_I2C_BLOCK_DATA, &data);
+	return i2c_smbus_throttle_xfer(client, I2C_SMBUS_WRITE, command,
+				       I2C_SMBUS_I2C_BLOCK_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_i2c_block_data);
 
@@ -547,6 +549,71 @@ s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
 }
 EXPORT_SYMBOL(i2c_smbus_xfer);
 
+static int i2c_smbus_throttle_enter(const struct i2c_client *client)
+		__acquires(&priv->throttle_lock)
+{
+	struct i2c_client_priv *priv;
+	ktime_t earliest;
+	int rc;
+
+	priv = to_i2c_client_priv(client);
+
+	if (i2c_in_atomic_xfer_mode()) {
+		if (!mutex_trylock(&priv->throttle_lock))
+			return -EAGAIN;
+	} else {
+		rc = mutex_lock_interruptible(&priv->throttle_lock);
+		if (rc)
+			return rc;
+	}
+	earliest = ktime_add_us(priv->last, priv->delay_us);
+
+	if (priv->delay_us && ktime_before(ktime_get(), earliest)) {
+		if (i2c_in_atomic_xfer_mode()) {
+			mutex_unlock(&priv->throttle_lock);
+			return -EAGAIN;
+		}
+
+		usleep_range(priv->delay_us, 2 * priv->delay_us);
+	}
+
+	return 0;
+}
+
+static void i2c_smbus_throttle_exit(const struct i2c_client *client)
+		__releases(&priv->throttle_lock)
+{
+	struct i2c_client_priv *priv;
+
+	priv = to_i2c_client_priv(client);
+
+	if (priv->delay_us)
+		priv->last = ktime_get();
+	mutex_unlock(&priv->throttle_lock);
+}
+
+static s32 i2c_smbus_throttle_xfer(const struct i2c_client *client,
+				   char read_write, u8 command, int protocol,
+				   union i2c_smbus_data *data)
+{
+	s32 res;
+
+	res = i2c_smbus_throttle_enter(client);
+	if (res)
+		return res;
+
+	res = __i2c_lock_bus_helper(client->adapter);
+	if (!res)
+		res = __i2c_smbus_xfer(client->adapter, client->addr,
+				       client->flags, read_write, command,
+				       protocol, data);
+	i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
+
+	i2c_smbus_throttle_exit(client);
+
+	return res;
+}
+
 s32 __i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
 		     unsigned short flags, char read_write,
 		     u8 command, int protocol, union i2c_smbus_data *data)
@@ -715,3 +782,47 @@ int of_i2c_setup_smbus_alert(struct i2c_adapter *adapter)
 }
 EXPORT_SYMBOL_GPL(of_i2c_setup_smbus_alert);
 #endif
+
+int i2c_smbus_throttle_client(struct i2c_client *client,
+			       unsigned long delay_us)
+{
+	struct i2c_client_priv *priv;
+	int rc;
+
+	priv = to_i2c_client_priv(client);
+
+	if (i2c_in_atomic_xfer_mode()) {
+		if (!mutex_trylock(&priv->throttle_lock))
+			return -EAGAIN;
+	} else {
+		rc = mutex_lock_interruptible(&priv->throttle_lock);
+		if (rc)
+			return rc;
+	}
+	priv->delay_us = delay_us;
+	priv->last = ktime_get();
+	mutex_unlock(&priv->throttle_lock);
+
+	return 0;
+}
+
+int i2c_smbus_throttle_value(struct i2c_client *client, unsigned long *delay_us)
+{
+	struct i2c_client_priv *priv;
+	int rc;
+
+	priv = to_i2c_client_priv(client);
+
+	if (i2c_in_atomic_xfer_mode()) {
+		if (!mutex_trylock(&priv->throttle_lock))
+			return -EAGAIN;
+	} else {
+		rc = mutex_lock_interruptible(&priv->throttle_lock);
+		if (rc)
+			return rc;
+	}
+	*delay_us = priv->delay_us;
+	mutex_unlock(&priv->throttle_lock);
+
+	return 0;
+}
diff --git a/drivers/i2c/i2c-core.h b/drivers/i2c/i2c-core.h
index 8ce261167a2d..e916624c7b98 100644
--- a/drivers/i2c/i2c-core.h
+++ b/drivers/i2c/i2c-core.h
@@ -4,6 +4,27 @@
  */
 
 #include <linux/rwsem.h>
+#include <linux/i2c.h>
+#include <linux/timekeeping.h>
+#include <linux/kernel.h>
+#include <linux/mutex.h>
+
+struct i2c_client_priv {
+	struct i2c_client client;
+
+	/*
+	 * Per-client access throttling, described in terms of microsecond
+	 * delay between the end of the nth transfer and the start of the
+	 * (n+1)th transfer
+	 *
+	 * Do it in a wrapper struct to preserve const-ness of the i2c_smbus_*
+	 * interfaces.
+	 */
+	struct mutex throttle_lock;
+	unsigned long delay_us;
+	ktime_t last;
+};
+#define to_i2c_client_priv(c) container_of(c, struct i2c_client_priv, client)
 
 struct i2c_devinfo {
 	struct list_head	list;
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 56622658b215..c05039e37d97 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -181,8 +181,13 @@ s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client,
 s32 i2c_smbus_read_i2c_block_data_or_emulated(const struct i2c_client *client,
 					      u8 command, u8 length,
 					      u8 *values);
+int i2c_smbus_throttle_client(struct i2c_client *client,
+			       unsigned long delay_us);
+int i2c_smbus_throttle_value(struct i2c_client *client,
+			     unsigned long *delay_us);
 int i2c_get_device_id(const struct i2c_client *client,
 		      struct i2c_device_identity *id);
+
 #endif /* I2C */
 
 /**
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 32/35] pmbus: (ucd9000) Throttle SMBus transfers to avoid poor behaviour
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (30 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 31/35] i2c: Allow throttling of transfers to client devices Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page() Eddie James
                   ` (3 subsequent siblings)
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

Short turn-around times between transfers to UCD9000 devices can lead to
problematic behaviour, including unnecessary clock stretching, bus
lockups and potential corruption of the device's volatile state.

Introduce transfer throttling for the device with a minimum access
delay of 1ms.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 drivers/hwmon/pmbus/ucd9000.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/hwmon/pmbus/ucd9000.c b/drivers/hwmon/pmbus/ucd9000.c
index f8017993e2b4..ad4d621398e5 100644
--- a/drivers/hwmon/pmbus/ucd9000.c
+++ b/drivers/hwmon/pmbus/ucd9000.c
@@ -487,6 +487,8 @@ static int ucd9000_init_debugfs(struct i2c_client *client,
 }
 #endif /* CONFIG_DEBUG_FS */
 
+#define UCD9000_SMBUS_THROTTLE_US	1000
+
 static int ucd9000_probe(struct i2c_client *client)
 {
 	u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
@@ -501,6 +503,8 @@ static int ucd9000_probe(struct i2c_client *client)
 				     I2C_FUNC_SMBUS_BLOCK_DATA))
 		return -ENODEV;
 
+	i2c_smbus_throttle_client(client, UCD9000_SMBUS_THROTTLE_US);
+
 	ret = i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
 					block_buffer);
 	if (ret < 0) {
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page()
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (31 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 32/35] pmbus: (ucd9000) Throttle SMBus transfers to avoid poor behaviour Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-09 20:21   ` Andrei Kartashev
  2021-03-12  0:35   ` Joel Stanley
  2021-03-08 22:54 ` [PATCH linux dev-5.10 34/35] pmbus: (max31785) Add a local pmbus_set_page() implementation Eddie James
                   ` (2 subsequent siblings)
  35 siblings, 2 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

From extensive testing and tracing it was discovered that the MAX31785
occasionally fails to switch pages despite ACK'ing the PAGE PMBus data
write. I suspect this behaviour had been seen on other devices as well,
as pmbus_set_page() already read-back the freshly set value and errored
out if it wasn't what we requested.

In the case of the MAX31785 it was shown that a one-shot retry was
enough to get the PAGE write to stick if the inital command failed. To
improve robustness, only error out if the one-shot retry also fails to
stick.

OpenBMC-Staging-Count: 1
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/hwmon/pmbus/pmbus_core.c | 31 ++++++++++++++++++++-----------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
index 44c1a0a07509..dd4a09d18730 100644
--- a/drivers/hwmon/pmbus/pmbus_core.c
+++ b/drivers/hwmon/pmbus/pmbus_core.c
@@ -151,25 +151,34 @@ int pmbus_set_page(struct i2c_client *client, int page, int phase)
 
 	if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
 	    data->info->pages > 1 && page != data->currpage) {
+		int i;
+
 		dev_dbg(&client->dev, "Want page %u, %u cached\n", page,
 			data->currpage);
 
-		rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
-		if (rv < 0) {
+		for (i = 0; i < 2; i++) {
 			rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE,
 						       page);
-			dev_dbg(&client->dev,
-				"Failed to set page %u, performed one-shot retry %s: %d\n",
-				page, rv ? "and failed" : "with success", rv);
+			if (rv)
+				continue;
+
+			rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
 			if (rv < 0)
-				return rv;
-		}
+				continue;
 
-		rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
-		if (rv < 0)
-			return rv;
+			/* Success, exit loop */
+			if (rv == page)
+				break;
+
+			rv = i2c_smbus_read_byte_data(client, PMBUS_STATUS_CML);
+			if (rv < 0)
+				continue;
+
+			if (rv & PB_CML_FAULT_INVALID_DATA)
+				return -EIO;
+		}
 
-		if (rv != page)
+		if (i == 2)
 			return -EIO;
 	}
 	data->currpage = page;
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 34/35] pmbus: (max31785) Add a local pmbus_set_page() implementation
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (32 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page() Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-08 22:54 ` [PATCH linux dev-5.10 35/35] pmbus: (max31785) Retry enabling fans after writing MFR_FAN_CONFIG Eddie James
  2021-03-12  0:37 ` [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Joel Stanley
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

Extensive testing and tracing has shown that the MAX31785 is unreliable
in the face of PAGE write commands, ACK'ing the PAGE request but
reporting a value of 0 on some subsequent PAGE reads. The trace data
suggests that a one-shot retry of the PAGE write is enough to get the
requested value to stick.

As we configure the device before registering with the PMBus core,
centralise PAGE handling inside the driver and implement the one-shot
retry semantics there.

OpenBMC-Staging-Count: 1
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/hwmon/pmbus/max31785.c | 32 ++++++++++++++++++++++++++------
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/hwmon/pmbus/max31785.c b/drivers/hwmon/pmbus/max31785.c
index 5cfa7e97b489..1e021c38d507 100644
--- a/drivers/hwmon/pmbus/max31785.c
+++ b/drivers/hwmon/pmbus/max31785.c
@@ -362,6 +362,27 @@ static int max31785_write_word_data(struct i2c_client *client, int page,
 	return -ENXIO;
 }
 
+static int max31785_pmbus_set_page(struct i2c_client *client, int page)
+{
+	int ret;
+	int i;
+
+	for (i = 0; i < 2; i++) {
+		ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
+		if (ret < 0)
+			return ret;
+
+		ret = max31785_i2c_smbus_read_byte_data(client, PMBUS_PAGE);
+		if (ret < 0)
+			return ret;
+
+		if (ret == page)
+			return 0;
+	}
+
+	return -EIO;
+}
+
 /*
  * Returns negative error codes if an unrecoverable problem is detected, 0 if a
  * recoverable problem is detected, or a positive value on success.
@@ -392,7 +413,7 @@ static int max31785_of_fan_config(struct i2c_client *client,
 		return -ENXIO;
 	}
 
-	ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
+	ret = max31785_pmbus_set_page(client, page);
 	if (ret < 0)
 		return ret;
 
@@ -599,7 +620,7 @@ static int max31785_of_tmp_config(struct i2c_client *client,
 		return -ENXIO;
 	}
 
-	ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
+	ret = max31785_pmbus_set_page(client, page);
 	if (ret < 0)
 		return ret;
 
@@ -700,7 +721,7 @@ static int max31785_configure_dual_tach(struct i2c_client *client,
 	int i;
 
 	for (i = 0; i < MAX31785_NR_FAN_PAGES; i++) {
-		ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
+		ret = max31785_pmbus_set_page(client, i);
 		if (ret < 0)
 			return ret;
 
@@ -741,7 +762,7 @@ static int max31785_probe(struct i2c_client *client)
 
 	*info = max31785_info;
 
-	ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_PAGE, 255);
+	ret = max31785_pmbus_set_page(client, 255);
 	if (ret < 0)
 		return ret;
 
@@ -785,8 +806,7 @@ static int max31785_probe(struct i2c_client *client)
 		if (!have_fan || fan_configured)
 			continue;
 
-		ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_PAGE,
-							 i);
+		ret = max31785_pmbus_set_page(client, i);
 		if (ret < 0)
 			return ret;
 
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* [PATCH linux dev-5.10 35/35] pmbus: (max31785) Retry enabling fans after writing MFR_FAN_CONFIG
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (33 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 34/35] pmbus: (max31785) Add a local pmbus_set_page() implementation Eddie James
@ 2021-03-08 22:54 ` Eddie James
  2021-03-12  0:37 ` [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Joel Stanley
  35 siblings, 0 replies; 61+ messages in thread
From: Eddie James @ 2021-03-08 22:54 UTC (permalink / raw)
  To: openbmc

From: Andrew Jeffery <andrew@aj.id.au>

It has been observed across large fleets of systems that a small subset
of those systems occasionally loose control of some number of fans
across a BMC reboot (their hwmon fan attributes are missing from sysfs).

>From extensive testing and tracing it was discovered that writes
enabling a fan in FAN_CONFIG_1_2 failed to stick on the system under
test with a frequency of about 1 in 1000 re-binds of the driver.

The MAX31785 datasheet recommends in the documentation for
MFR_FAN_CONFIG that the asssociated fan(s) be disabled before updating
the register. The sequence in question implements this suggestion, and
the observed loss-of-fans symptom occurs when the write to re-enable the
fan in FAN_CONFIG_1_2 fails to stick.

The trace data suggests a one-shot retry is enough to successfully
update FAN_CONFIG_1_2. With the workaround, no loss of fans was observed
in over 20,000 consecutive rebinds of the driver.

OpenBMC-Staging-Count: 1
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 drivers/hwmon/pmbus/max31785.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/hwmon/pmbus/max31785.c b/drivers/hwmon/pmbus/max31785.c
index 1e021c38d507..0c2fe22018a3 100644
--- a/drivers/hwmon/pmbus/max31785.c
+++ b/drivers/hwmon/pmbus/max31785.c
@@ -398,6 +398,7 @@ static int max31785_of_fan_config(struct i2c_client *client,
 	u32 page;
 	u32 uval;
 	int ret;
+	int i;
 
 	if (!of_device_is_compatible(child, "pmbus-fan"))
 		return 0;
@@ -574,10 +575,24 @@ static int max31785_of_fan_config(struct i2c_client *client,
 	if (ret < 0)
 		return ret;
 
-	ret = max31785_i2c_smbus_write_byte_data(client, PMBUS_FAN_CONFIG_12,
-						 pb_cfg);
-	if (ret < 0)
-		return ret;
+	for (i = 0; i < 2; i++) {
+		ret = max31785_i2c_smbus_write_byte_data(client,
+							 PMBUS_FAN_CONFIG_12,
+							 pb_cfg);
+		if (ret < 0)
+			continue;
+
+		ret = max31785_i2c_smbus_read_byte_data(client,
+							PMBUS_FAN_CONFIG_12);
+		if (ret < 0)
+			continue;
+
+		if (ret == pb_cfg)
+			break;
+	}
+
+	if (i == 2)
+		return -EIO;
 
 	/*
 	 * Fans are on pages 0 - 5. If the page property of a fan node is
-- 
2.27.0


^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page()
  2021-03-08 22:54 ` [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page() Eddie James
@ 2021-03-09 20:21   ` Andrei Kartashev
  2021-03-12  0:35   ` Joel Stanley
  1 sibling, 0 replies; 61+ messages in thread
From: Andrei Kartashev @ 2021-03-09 20:21 UTC (permalink / raw)
  To: Eddie James, openbmc

Hi,
I have a similar patch in our local tree, but it adds retry in more
places. I had to add retries for all i2c_smbus_* operations because pf
communication to PSUs sometime very unstable.
Here is it:

From 7688b90c3e7e4986535a194a271509095534c3e7 Mon Sep 17 00:00:00 2001
From: Andrei Kartashev <a.kartashev@yadro.com>
Date: Tue, 9 Mar 2021 21:47:25 +0300
Subject: [PATCH] hwmon: (pmbus) Retry I2C request on failure

In real world I2C communication errors are possible. It was discovered
that pmbus read operation for some PSUs occasionally fails in random
places. For pmbus_set_page call there is already retry implemented, but
seems it is not enough.

Add retries for every i2c_smbus_read/i2c_smbus_write call to increase
robust.

Signed-off-by: Andrei Kartashev <a.kartashev@yadro.com>
---
 drivers/hwmon/pmbus/pmbus_core.c | 65 +++++++++++++++++++-------------
 1 file changed, 38 insertions(+), 27 deletions(-)

diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
index 60ea917936a7..d98b52950022 100644
--- a/drivers/hwmon/pmbus/pmbus_core.c
+++ b/drivers/hwmon/pmbus/pmbus_core.c
@@ -27,6 +27,7 @@
  */
 #define PMBUS_ATTR_ALLOC_SIZE	32
 #define PMBUS_NAME_SIZE		24
+#define I2C_RETRIES 3
 
 struct pmbus_sensor {
 	struct pmbus_sensor *next;
@@ -144,7 +145,7 @@ EXPORT_SYMBOL_GPL(pmbus_clear_cache);
 int pmbus_set_page(struct i2c_client *client, int page, int phase)
 {
 	struct pmbus_data *data = i2c_get_clientdata(client);
-	int rv;
+	int rv, rtr;
 
 	if (page < 0)
 		return 0;
@@ -154,18 +155,12 @@ int pmbus_set_page(struct i2c_client *client, int page, int phase)
 		dev_dbg(&client->dev, "Want page %u, %u cached\n", page,
 			data->currpage);
 
-		rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
-		if (rv < 0) {
+		for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
 			rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE,
 						       page);
-			dev_dbg(&client->dev,
-				"Failed to set page %u, performed one-shot retry %s: %d\n",
-				page, rv ? "and failed" : "with success", rv);
-			if (rv < 0)
-				return rv;
-		}
 
-		rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
+		for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+			rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
 		if (rv < 0)
 			return rv;
 
@@ -176,8 +171,9 @@ int pmbus_set_page(struct i2c_client *client, int page, int phase)
 
 	if (data->info->phases[page] && data->currphase != phase &&
 	    !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) {
-		rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
-					       phase);
+		for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+			rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
+						       phase);
 		if (rv)
 			return rv;
 	}
@@ -189,13 +185,15 @@ EXPORT_SYMBOL_GPL(pmbus_set_page);
 
 int pmbus_write_byte(struct i2c_client *client, int page, u8 value)
 {
-	int rv;
+	int rv, rtr;
 
 	rv = pmbus_set_page(client, page, 0xff);
 	if (rv < 0)
 		return rv;
 
-	return i2c_smbus_write_byte(client, value);
+	for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+		rv = i2c_smbus_write_byte(client, value);
+	return rv;
 }
 EXPORT_SYMBOL_GPL(pmbus_write_byte);
 
@@ -220,13 +218,15 @@ static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value)
 int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
 			  u16 word)
 {
-	int rv;
+	int rv, rtr;
 
 	rv = pmbus_set_page(client, page, 0xff);
 	if (rv < 0)
 		return rv;
 
-	return i2c_smbus_write_word_data(client, reg, word);
+	for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+		rv = i2c_smbus_write_word_data(client, reg, word);
+	return rv;
 }
 EXPORT_SYMBOL_GPL(pmbus_write_word_data);
 
@@ -302,13 +302,15 @@ EXPORT_SYMBOL_GPL(pmbus_update_fan);
 
 int pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg)
 {
-	int rv;
+	int rv, rtr;
 
 	rv = pmbus_set_page(client, page, phase);
 	if (rv < 0)
 		return rv;
 
-	return i2c_smbus_read_word_data(client, reg);
+	for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+		rv = i2c_smbus_read_word_data(client, reg);
+	return rv;
 }
 EXPORT_SYMBOL_GPL(pmbus_read_word_data);
 
@@ -361,25 +363,29 @@ static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg)
 
 int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg)
 {
-	int rv;
+	int rv, rtr;
 
 	rv = pmbus_set_page(client, page, 0xff);
 	if (rv < 0)
 		return rv;
 
-	return i2c_smbus_read_byte_data(client, reg);
+	for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+		rv = i2c_smbus_read_byte_data(client, reg);
+	return rv;
 }
 EXPORT_SYMBOL_GPL(pmbus_read_byte_data);
 
 int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value)
 {
-	int rv;
+	int rv, rtr;
 
 	rv = pmbus_set_page(client, page, 0xff);
 	if (rv < 0)
 		return rv;
 
-	return i2c_smbus_write_byte_data(client, reg, value);
+	for (rtr = 0, rv = -1; (rtr < I2C_RETRIES) && (rv < 0); rtr++)
+		rv = i2c_smbus_write_byte_data(client, reg, value);
+	return rv;
 }
 EXPORT_SYMBOL_GPL(pmbus_write_byte_data);
 
@@ -2193,7 +2199,7 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
 			     struct pmbus_driver_info *info)
 {
 	struct device *dev = &client->dev;
-	int page, ret;
+	int page, ret, rtr;
 
 	/*
 	 * Some PMBus chips don't support PMBUS_STATUS_WORD, so try
@@ -2201,10 +2207,13 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
 	 * Bail out if both registers are not supported.
 	 */
 	data->read_status = pmbus_read_status_word;
-	ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
+	for (rtr = 0, ret = -1; (rtr < I2C_RETRIES) && (ret < 0); rtr++)
+		ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
 	if (ret < 0 || ret == 0xffff) {
 		data->read_status = pmbus_read_status_byte;
-		ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE);
+		for (rtr = 0, ret = -1; (rtr < I2C_RETRIES) && (ret < 0); rtr++)
+			ret = i2c_smbus_read_byte_data(client,
+						       PMBUS_STATUS_BYTE);
 		if (ret < 0 || ret == 0xff) {
 			dev_err(dev, "PMBus status register not found\n");
 			return -ENODEV;
@@ -2214,7 +2223,8 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
 	}
 
 	/* Enable PEC if the controller supports it */
-	ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
+	for (rtr = 0, ret = -1; (rtr < I2C_RETRIES) && (ret < 0); rtr++)
+		ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
 	if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
 		client->flags |= I2C_CLIENT_PEC;
 
@@ -2223,7 +2233,8 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
 	 * faults, and we should not try it. Also, in that case, writes into
 	 * limit registers need to be disabled.
 	 */
-	ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
+	for (rtr = 0, ret = -1; (rtr < I2C_RETRIES) && (ret < 0); rtr++)
+		ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
 	if (ret > 0 && (ret & PB_WP_ANY))
 		data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK;
 
-- 
2.26.2




On Mon, 2021-03-08 at 16:54 -0600, Eddie James wrote:
> From: Andrew Jeffery <andrew@aj.id.au>
> 
> From extensive testing and tracing it was discovered that the
> MAX31785
> occasionally fails to switch pages despite ACK'ing the PAGE PMBus
> data
> write. I suspect this behaviour had been seen on other devices as
> well,
> as pmbus_set_page() already read-back the freshly set value and
> errored
> out if it wasn't what we requested.
> 
> In the case of the MAX31785 it was shown that a one-shot retry was
> enough to get the PAGE write to stick if the inital command failed.
> To
> improve robustness, only error out if the one-shot retry also fails
> to
> stick.
> 
> OpenBMC-Staging-Count: 1
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  drivers/hwmon/pmbus/pmbus_core.c | 31 ++++++++++++++++++++--------
> ---
>  1 file changed, 20 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/hwmon/pmbus/pmbus_core.c
> b/drivers/hwmon/pmbus/pmbus_core.c
> index 44c1a0a07509..dd4a09d18730 100644
> --- a/drivers/hwmon/pmbus/pmbus_core.c
> +++ b/drivers/hwmon/pmbus/pmbus_core.c
> @@ -151,25 +151,34 @@ int pmbus_set_page(struct i2c_client *client,
> int page, int phase)
>  
>  	if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
>  	    data->info->pages > 1 && page != data->currpage) {
> +		int i;
> +
>  		dev_dbg(&client->dev, "Want page %u, %u cached\n",
> page,
>  			data->currpage);
>  
> -		rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE,
> page);
> -		if (rv < 0) {
> +		for (i = 0; i < 2; i++) {
>  			rv = i2c_smbus_write_byte_data(client,
> PMBUS_PAGE,
>  						       page);
> -			dev_dbg(&client->dev,
> -				"Failed to set page %u, performed one-
> shot retry %s: %d\n",
> -				page, rv ? "and failed" : "with
> success", rv);
> +			if (rv)
> +				continue;
> +
> +			rv = i2c_smbus_read_byte_data(client,
> PMBUS_PAGE);
>  			if (rv < 0)
> -				return rv;
> -		}
> +				continue;
>  
> -		rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
> -		if (rv < 0)
> -			return rv;
> +			/* Success, exit loop */
> +			if (rv == page)
> +				break;
> +
> +			rv = i2c_smbus_read_byte_data(client,
> PMBUS_STATUS_CML);
> +			if (rv < 0)
> +				continue;
> +
> +			if (rv & PB_CML_FAULT_INVALID_DATA)
> +				return -EIO;
> +		}
>  
> -		if (rv != page)
> +		if (i == 2)
>  			return -EIO;
>  	}
>  	data->currpage = page;
-- 
Best regards,
Andrei Kartashev



^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 02/35] ARM: dts: aspeed: rainier: Add directly controlled LEDs
  2021-03-08 22:53 ` [PATCH linux dev-5.10 02/35] ARM: dts: aspeed: rainier: Add directly controlled LEDs Eddie James
@ 2021-03-12  0:04   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:04 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Vishwanatha Subbanna <vishwa@linux.ibm.com>
>
> These LEDs are directly connected to the BMC's GPIO bank.
>
> OpenBMC-Staging-Count: 1

Drop this when putting patches on the list.

> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.ibm.com>
> Reviewed-by: Eddie James <eajames@linux.ibm.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 24 ++++++++++++++++++--
>  1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index fdeac6d0d8d3..f52c10dd1a18 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -135,6 +135,26 @@ i2c2mux3: i2c@3 {
>         leds {
>                 compatible = "gpio-leds";
>
> +               /* BMC Card fault LED at the back */
> +               bmc-ingraham0 {
> +                       gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>;
> +               };
> +
> +               /* Enclosure ID LED at the back */
> +               rear-enc-id0 {
> +                       gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>;
> +               };
> +
> +               /* Enclosure fault LED at the back */
> +               rear-enc-fault0 {
> +                       gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
> +               };
> +
> +               /* PCIE slot power LED */
> +               pcieslot-power {
> +                       gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>;
> +               };
> +
>                 /* System ID LED that is at front on Op Panel */
>                 front-sys-id0 {
>                         retain-state-shutdown;
> @@ -178,7 +198,7 @@ &gpio0 {
>         /*E0-E7*/       "","","","","","","","",
>         /*F0-F7*/       "","","","","","","","",
>         /*G0-G7*/       "","","","","","","","",
> -       /*H0-H7*/       "","","","","","","","",
> +       /*H0-H7*/       "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",
>         /*I0-I7*/       "","","","","","","","",
>         /*J0-J7*/       "","","","","","","","",
>         /*K0-K7*/       "","","","","","","","",
> @@ -186,7 +206,7 @@ &gpio0 {
>         /*M0-M7*/       "","","","","","","","",
>         /*N0-N7*/       "","","","","","","","",
>         /*O0-O7*/       "","","","usb-power","","","","",
> -       /*P0-P7*/       "","","","","","","","",
> +       /*P0-P7*/       "","","","","pcieslot-power","","","",
>         /*Q0-Q7*/       "cfam-reset","","","","","","","",
>         /*R0-R7*/       "","","","","","","","",
>         /*S0-S7*/       "presence-ps0","presence-ps1","presence-ps2","presence-ps3",
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs
  2021-03-08 22:53 ` [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Eddie James
@ 2021-03-12  0:05   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:05 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Vishwanatha Subbanna <vishwa@linux.ibm.com>
>
> These LEDs are on the op-panel and are connected via a pca9551 i2c
> LED expander.
>
> OpenBMC-Staging-Count: 1
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.ibm.com>
> Reviewed-by: Eddie James <eajames@linux.ibm.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 82 ++++++++++++++++++++
>  1 file changed, 82 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 0e1e76421d9d..fdeac6d0d8d3 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -131,6 +131,38 @@ i2c2mux3: i2c@3 {
>                         reg = <3>;
>                 };
>         };
> +
> +       leds {
> +               compatible = "gpio-leds";
> +
> +               /* System ID LED that is at front on Op Panel */
> +               front-sys-id0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca_oppanel 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               /* System Attention Indicator ID LED that is at front on Op Panel */
> +               front-check-log0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca_oppanel 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               /* Enclosure Fault LED that is at front on Op Panel */
> +               front-enc-fault1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca_oppanel 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               /* System PowerOn LED that is at front on Op Panel */
> +               front-sys-pwron0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
> +               };
> +       };
>  };
>
>  &ehci1 {
> @@ -848,6 +880,56 @@ ibm-panel@62 {
>                 reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
>         };
>
> +       pca_oppanel: pca9551@60 {
> +               compatible = "nxp,pca9551";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };

Why do we enable all 8 lines as GPIOs if we're only using the first four?

> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
> +
>         dps: dps310@76 {
>                 compatible = "infineon,dps310";
>                 reg = <0x76>;
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 03/35] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans
  2021-03-08 22:53 ` [PATCH linux dev-5.10 03/35] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans Eddie James
@ 2021-03-12  0:06   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:06 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Brandon Wyman <bjwyman@gmail.com>
>
> Add a gpio-keys-polled section to the Rainier device tree for the fan
> presence signals on the PCA9552 I2C device on bus 7.
>
> Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
> Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 43 ++++++++++++++++++++
>  1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index f52c10dd1a18..98c396283c1b 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -183,6 +183,49 @@ front-sys-pwron0 {
>                         gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
>                 };
>         };
> +
> +       gpio-keys-polled {
> +               compatible = "gpio-keys-polled";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               poll-interval = <1000>;
> +
> +               fan0-presence {
> +                       label = "fan0-presence";
> +                       gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
> +                       linux,code = <6>;
> +               };
> +
> +               fan1-presence {
> +                       label = "fan1-presence";
> +                       gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
> +                       linux,code = <7>;
> +               };
> +
> +               fan2-presence {
> +                       label = "fan2-presence";
> +                       gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
> +                       linux,code = <8>;
> +               };
> +
> +               fan3-presence {
> +                       label = "fan3-presence";
> +                       gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
> +                       linux,code = <9>;
> +               };
> +
> +               fan4-presence {
> +                       label = "fan4-presence";
> +                       gpios = <&pca0 10 GPIO_ACTIVE_LOW>;
> +                       linux,code = <10>;
> +               };
> +
> +               fan5-presence {
> +                       label = "fan5-presence";
> +                       gpios = <&pca0 11 GPIO_ACTIVE_LOW>;
> +                       linux,code = <11>;
> +               };
> +       };
>  };
>
>  &ehci1 {
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 04/35] ARM: dts: aspeed: rainier: Set MAX31785 config
  2021-03-08 22:53 ` [PATCH linux dev-5.10 04/35] ARM: dts: aspeed: rainier: Set MAX31785 config Eddie James
@ 2021-03-12  0:07   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:07 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Matthew Barth <msbarth@linux.ibm.com>
>
> Set the MAX31785 device configuration properties
>
> Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>

These properties are not supported upstream, and no effort has been
made to submit the required driver changes in some time.

Please discuss with Andrew what direction you want to take with these changes.

> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 54 ++++++++++++++++++++
>  1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 98c396283c1b..e147ff549517 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -827,24 +827,78 @@ fan0: fan@0 {
>                         compatible = "pmbus-fan";
>                         reg = <0>;
>                         tach-pulses = <2>;
> +                       maxim,fan-rotor-input = "tach";
> +                       maxim,fan-pwm-freq = <25000>;
> +                       maxim,fan-dual-tach;
> +                       maxim,fan-no-watchdog;
> +                       maxim,fan-no-fault-ramp;
> +                       maxim,fan-ramp = <2>;
> +                       maxim,fan-fault-pin-mon;
>                 };
>
>                 fan1: fan@1 {
>                         compatible = "pmbus-fan";
>                         reg = <1>;
>                         tach-pulses = <2>;
> +                       maxim,fan-rotor-input = "tach";
> +                       maxim,fan-pwm-freq = <25000>;
> +                       maxim,fan-dual-tach;
> +                       maxim,fan-no-watchdog;
> +                       maxim,fan-no-fault-ramp;
> +                       maxim,fan-ramp = <2>;
> +                       maxim,fan-fault-pin-mon;
>                 };
>
>                 fan2: fan@2 {
>                         compatible = "pmbus-fan";
>                         reg = <2>;
>                         tach-pulses = <2>;
> +                       maxim,fan-rotor-input = "tach";
> +                       maxim,fan-pwm-freq = <25000>;
> +                       maxim,fan-dual-tach;
> +                       maxim,fan-no-watchdog;
> +                       maxim,fan-no-fault-ramp;
> +                       maxim,fan-ramp = <2>;
> +                       maxim,fan-fault-pin-mon;
>                 };
>
>                 fan3: fan@3 {
>                         compatible = "pmbus-fan";
>                         reg = <3>;
>                         tach-pulses = <2>;
> +                       maxim,fan-rotor-input = "tach";
> +                       maxim,fan-pwm-freq = <25000>;
> +                       maxim,fan-dual-tach;
> +                       maxim,fan-no-watchdog;
> +                       maxim,fan-no-fault-ramp;
> +                       maxim,fan-ramp = <2>;
> +                       maxim,fan-fault-pin-mon;
> +               };
> +
> +               fan4: fan@4 {
> +                       compatible = "pmbus-fan";
> +                       reg = <4>;
> +                       tach-pulses = <2>;
> +                       maxim,fan-rotor-input = "tach";
> +                       maxim,fan-pwm-freq = <25000>;
> +                       maxim,fan-dual-tach;
> +                       maxim,fan-no-watchdog;
> +                       maxim,fan-no-fault-ramp;
> +                       maxim,fan-ramp = <2>;
> +                       maxim,fan-fault-pin-mon;
> +               };
> +
> +               fan5: fan@5 {
> +                       compatible = "pmbus-fan";
> +                       reg = <5>;
> +                       tach-pulses = <2>;
> +                       maxim,fan-rotor-input = "tach";
> +                       maxim,fan-pwm-freq = <25000>;
> +                       maxim,fan-dual-tach;
> +                       maxim,fan-no-watchdog;
> +                       maxim,fan-no-fault-ramp;
> +                       maxim,fan-ramp = <2>;
> +                       maxim,fan-fault-pin-mon;
>                 };
>         };
>
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 05/35] ARM: dts: aspeed: rainier: Add additional processor CFAMs
  2021-03-08 22:53 ` [PATCH linux dev-5.10 05/35] ARM: dts: aspeed: rainier: Add additional processor CFAMs Eddie James
@ 2021-03-12  0:07   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:07 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> Rainier has two dual-chip modules and therefore four CFAMs with their
> associated engines. Add these to the devicetree with the i2c busses
> that have devices on them.
>
> Signed-off-by: Eddie James <eajames@linux.ibm.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 281 ++++++++++++++++++-
>  1 file changed, 279 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index e147ff549517..6684485a2db0 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -12,6 +12,39 @@ / {
>         compatible = "ibm,rainier-bmc", "aspeed,ast2600";
>
>         aliases {
> +               i2c100 = &cfam0_i2c0;
> +               i2c101 = &cfam0_i2c1;
> +               i2c110 = &cfam0_i2c10;
> +               i2c111 = &cfam0_i2c11;
> +               i2c112 = &cfam0_i2c12;
> +               i2c113 = &cfam0_i2c13;
> +               i2c114 = &cfam0_i2c14;
> +               i2c115 = &cfam0_i2c15;
> +               i2c202 = &cfam1_i2c2;
> +               i2c203 = &cfam1_i2c3;
> +               i2c210 = &cfam1_i2c10;
> +               i2c211 = &cfam1_i2c11;
> +               i2c214 = &cfam1_i2c14;
> +               i2c215 = &cfam1_i2c15;
> +               i2c216 = &cfam1_i2c16;
> +               i2c217 = &cfam1_i2c17;
> +               i2c300 = &cfam2_i2c0;
> +               i2c301 = &cfam2_i2c1;
> +               i2c310 = &cfam2_i2c10;
> +               i2c311 = &cfam2_i2c11;
> +               i2c312 = &cfam2_i2c12;
> +               i2c313 = &cfam2_i2c13;
> +               i2c314 = &cfam2_i2c14;
> +               i2c315 = &cfam2_i2c15;
> +               i2c402 = &cfam3_i2c2;
> +               i2c403 = &cfam3_i2c3;
> +               i2c410 = &cfam3_i2c10;
> +               i2c411 = &cfam3_i2c11;
> +               i2c414 = &cfam3_i2c14;
> +               i2c415 = &cfam3_i2c15;
> +               i2c416 = &cfam3_i2c16;
> +               i2c417 = &cfam3_i2c17;
> +
>                 serial4 = &uart5;
>                 i2c16 = &i2c2mux0;
>                 i2c17 = &i2c2mux1;
> @@ -30,6 +63,10 @@ aliases {
>                 spi31 = &cfam2_spi1;
>                 spi32 = &cfam2_spi2;
>                 spi33 = &cfam2_spi3;
> +               spi40 = &cfam3_spi0;
> +               spi41 = &cfam3_spi1;
> +               spi42 = &cfam3_spi2;
> +               spi43 = &cfam3_spi3;
>         };
>
>         chosen {
> @@ -320,6 +357,38 @@ i2c@1800 {
>                         reg = <0x1800 0x400>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;
> +
> +                       cfam0_i2c0: i2c-bus@0 {
> +                               reg = <0>;      /* OMI01 */
> +                       };
> +
> +                       cfam0_i2c1: i2c-bus@1 {
> +                               reg = <1>;      /* OMI23 */
> +                       };
> +
> +                       cfam0_i2c10: i2c-bus@a {
> +                               reg = <10>;     /* OP3A */
> +                       };
> +
> +                       cfam0_i2c11: i2c-bus@b {
> +                               reg = <11>;     /* OP3B */
> +                       };
> +
> +                       cfam0_i2c12: i2c-bus@c {
> +                               reg = <12>;     /* OP4A */
> +                       };
> +
> +                       cfam0_i2c13: i2c-bus@d {
> +                               reg = <13>;     /* OP4B */
> +                       };
> +
> +                       cfam0_i2c14: i2c-bus@e {
> +                               reg = <14>;     /* OP5A */
> +                       };
> +
> +                       cfam0_i2c15: i2c-bus@f {
> +                               reg = <15>;     /* OP5B */
> +                       };
>                 };
>
>                 fsi2spi@1c00 {
> @@ -411,8 +480,6 @@ fsi_hub0: hub@3400 {
>                         reg = <0x3400 0x400>;
>                         #address-cells = <2>;
>                         #size-cells = <0>;
> -
> -                       no-scan-on-init;
>                 };
>         };
>  };
> @@ -434,6 +501,38 @@ i2c@1800 {
>                         reg = <0x1800 0x400>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;
> +
> +                       cfam1_i2c2: i2c-bus@2 {
> +                               reg = <2>;      /* OMI45 */
> +                       };
> +
> +                       cfam1_i2c3: i2c-bus@3 {
> +                               reg = <3>;      /* OMI67 */
> +                       };
> +
> +                       cfam1_i2c10: i2c-bus@a {
> +                               reg = <10>;     /* OP3A */
> +                       };
> +
> +                       cfam1_i2c11: i2c-bus@b {
> +                               reg = <11>;     /* OP3B */
> +                       };
> +
> +                       cfam1_i2c14: i2c-bus@e {
> +                               reg = <14>;     /* OP5A */
> +                       };
> +
> +                       cfam1_i2c15: i2c-bus@f {
> +                               reg = <15>;     /* OP5B */
> +                       };
> +
> +                       cfam1_i2c16: i2c-bus@10 {
> +                               reg = <16>;     /* OP6A */
> +                       };
> +
> +                       cfam1_i2c17: i2c-bus@11 {
> +                               reg = <17>;     /* OP6B */
> +                       };
>                 };
>
>                 fsi2spi@1c00 {
> @@ -546,6 +645,38 @@ i2c@1800 {
>                         reg = <0x1800 0x400>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;
> +
> +                       cfam2_i2c0: i2c-bus@0 {
> +                               reg = <0>;      /* OM01 */
> +                       };
> +
> +                       cfam2_i2c1: i2c-bus@1 {
> +                               reg = <1>;      /* OM23 */
> +                       };
> +
> +                       cfam2_i2c10: i2c-bus@a {
> +                               reg = <10>;     /* OP3A */
> +                       };
> +
> +                       cfam2_i2c11: i2c-bus@b {
> +                               reg = <11>;     /* OP3B */
> +                       };
> +
> +                       cfam2_i2c12: i2c-bus@c {
> +                               reg = <12>;     /* OP4A */
> +                       };
> +
> +                       cfam2_i2c13: i2c-bus@d {
> +                               reg = <13>;     /* OP4B */
> +                       };
> +
> +                       cfam2_i2c14: i2c-bus@e {
> +                               reg = <14>;     /* OP5A */
> +                       };
> +
> +                       cfam2_i2c15: i2c-bus@f {
> +                               reg = <15>;     /* OP5B */
> +                       };
>                 };
>
>                 fsi2spi@1c00 {
> @@ -641,6 +772,148 @@ fsi_hub2: hub@3400 {
>                         no-scan-on-init;
>                 };
>         };
> +
> +       cfam@3,0 {
> +               reg = <3 0>;
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               chip-id = <3>;
> +
> +               scom@1000 {
> +                       compatible = "ibm,fsi2pib";
> +                       reg = <0x1000 0x400>;
> +               };
> +
> +               i2c@1800 {
> +                       compatible = "ibm,fsi-i2c-master";
> +                       reg = <0x1800 0x400>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       cfam3_i2c2: i2c-bus@2 {
> +                               reg = <2>;      /* OM45 */
> +                       };
> +
> +                       cfam3_i2c3: i2c-bus@3 {
> +                               reg = <3>;      /* OM67 */
> +                       };
> +
> +                       cfam3_i2c10: i2c-bus@a {
> +                               reg = <10>;     /* OP3A */
> +                       };
> +
> +                       cfam3_i2c11: i2c-bus@b {
> +                               reg = <11>;     /* OP3B */
> +                       };
> +
> +                       cfam3_i2c14: i2c-bus@e {
> +                               reg = <14>;     /* OP5A */
> +                       };
> +
> +                       cfam3_i2c15: i2c-bus@f {
> +                               reg = <15>;     /* OP5B */
> +                       };
> +
> +                       cfam3_i2c16: i2c-bus@10 {
> +                               reg = <16>;     /* OP6A */
> +                       };
> +
> +                       cfam3_i2c17: i2c-bus@11 {
> +                               reg = <17>;     /* OP6B */
> +                       };
> +               };
> +
> +               fsi2spi@1c00 {
> +                       compatible = "ibm,fsi2spi";
> +                       reg = <0x1c00 0x400>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       cfam3_spi0: spi@0 {
> +                               reg = <0x0>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               eeprom@0 {
> +                                       at25,byte-len = <0x80000>;
> +                                       at25,addr-mode = <4>;
> +                                       at25,page-size = <256>;
> +
> +                                       compatible = "atmel,at25";
> +                                       reg = <0>;
> +                                       spi-max-frequency = <1000000>;
> +                               };
> +                       };
> +
> +                       cfam3_spi1: spi@20 {
> +                               reg = <0x20>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               eeprom@0 {
> +                                       at25,byte-len = <0x80000>;
> +                                       at25,addr-mode = <4>;
> +                                       at25,page-size = <256>;
> +
> +                                       compatible = "atmel,at25";
> +                                       reg = <0>;
> +                                       spi-max-frequency = <1000000>;
> +                               };
> +                       };
> +
> +                       cfam3_spi2: spi@40 {
> +                               reg = <0x40>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               eeprom@0 {
> +                                       at25,byte-len = <0x80000>;
> +                                       at25,addr-mode = <4>;
> +                                       at25,page-size = <256>;
> +
> +                                       compatible = "atmel,at25";
> +                                       reg = <0>;
> +                                       spi-max-frequency = <1000000>;
> +                               };
> +                       };
> +
> +                       cfam3_spi3: spi@60 {
> +                               reg = <0x60>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               eeprom@0 {
> +                                       at25,byte-len = <0x80000>;
> +                                       at25,addr-mode = <4>;
> +                                       at25,page-size = <256>;
> +
> +                                       compatible = "atmel,at25";
> +                                       reg = <0>;
> +                                       spi-max-frequency = <1000000>;
> +                               };
> +                       };
> +               };
> +
> +               sbefifo@2400 {
> +                       compatible = "ibm,p9-sbefifo";
> +                       reg = <0x2400 0x400>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       fsi_occ3: occ {
> +                               compatible = "ibm,p10-occ";
> +                       };
> +               };
> +
> +               fsi_hub3: hub@3400 {
> +                       compatible = "fsi-master-hub";
> +                       reg = <0x3400 0x400>;
> +                       #address-cells = <2>;
> +                       #size-cells = <0>;
> +
> +                       no-scan-on-init;
> +               };
> +       };
>  };
>
>  /* Legacy OCC numbering (to get rid of when userspace is fixed) */
> @@ -656,6 +929,10 @@ &fsi_occ2 {
>         reg = <3>;
>  };
>
> +&fsi_occ3 {
> +       reg = <4>;
> +};
> +
>  &ibt {
>         status = "okay";
>  };
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  2021-03-08 22:53 ` [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Eddie James
@ 2021-03-12  0:09   ` Joel Stanley
  2021-03-12  0:21   ` Milton Miller II
  1 sibling, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:09 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>
> These LEDs are on the fans and are connected via a
> pca9551 i2c expander

This change doesn't make sense. The pca9551 is an i2c LED expander, so
we don't need to expose the pins as GPIOs and then attach a gpio-leds
driver to them. We should instead simply configure the pca955x driver
to drive the LEDs as LEDs.

>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 41 ++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 6684485a2db0..514a14d3f914 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -263,6 +263,47 @@ fan5-presence {
>                         linux,code = <11>;
>                 };
>         };
> +
> +       leds {
> +               compatible = "gpio-leds";
> +
> +               fan0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               fan1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               fan2 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               fan3 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               fan4 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               fan5 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +
>  };
>
>  &ehci1 {
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 07/35] ARM: dts: aspeed: rainier: Add leds that are off pic16f882
  2021-03-08 22:53 ` [PATCH linux dev-5.10 07/35] ARM: dts: aspeed: rainier: Add leds that are off pic16f882 Eddie James
@ 2021-03-12  0:10   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:10 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>
> There are many LEDs that are connected to PIC16F882.
> PIC has the software implementation of pca9552

Similar to the other PCA change, this change doesn't make sense.
Configure the pca955x driver to drive the LEDs as LEDs.

>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 690 +++++++++++++++++++
>  1 file changed, 690 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 514a14d3f914..32b63112091c 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -302,6 +302,336 @@ fan5 {
>                         default-state = "keep";
>                         gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
>                 };
> +
> +               ddimm0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm2 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm3 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm4 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm5 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm6 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm7 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 7 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm8 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 8 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm9 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 9 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm10 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 10 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm11 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 11 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm12 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 12 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm13 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 13 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm14 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 14 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm15 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic1 15 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm16 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm17 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm18 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm19 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm20 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm21 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm22 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm23 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 7 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm24 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 8 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm25 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 9 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm26 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 10 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm27 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 11 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm28 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 12 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm29 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 13 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm30 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 14 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               ddimm31 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic2 15 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot2 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot3 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot4 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cpu1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cpu1-vrm0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               lcd-russel {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic3 8 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               planar {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cpu0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               dasd-pyramid0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               dasd-pyramid1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               dasd-pyramid2 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cpu0-vrm0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               rtc-battery {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 7 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               base-blyth {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 8 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot6 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 9 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot7 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 10 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot8 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 11 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot9 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 12 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot10 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 13 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               pcieslot11 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 14 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               tpm-wilson {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
> +               };
>         };
>
>  };
> @@ -1365,6 +1695,366 @@ gpio@7 {
>                 };
>         };
>
> +       pic1: pca9952@32 {
> +               compatible = "ibm,pca9552";
> +               reg = <0x32>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
> +
> +       pic2: pca9552@31 {
> +               compatible = "ibm,pca9552";
> +               reg = <0x31>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
> +
> +       pic3: pca9552@30 {
> +               compatible = "ibm,pca9552";
> +               reg = <0x30>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
> +
> +       pic4: pca9552@33 {
> +               compatible = "ibm,pca9552";
> +               reg = <0x33>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
> +
>         dps: dps310@76 {
>                 compatible = "infineon,dps310";
>                 reg = <0x76>;
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 08/35] ARM: dts: aspeed: rainier: Add leds on optional DASD cards
  2021-03-08 22:53 ` [PATCH linux dev-5.10 08/35] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Eddie James
@ 2021-03-12  0:10   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:10 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>
> These cards are not hot pluggable and must be installed
> prior to boot. LEDs on these are controlled by PCA9552
> i2c expander

Again, use the PCA952x driver correctly.

>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 425 +++++++++++++++++++
>  1 file changed, 425 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 32b63112091c..c507e8da101e 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -634,6 +634,161 @@ tpm-wilson {
>                 };
>         };
>
> +       leds-optional-dasd-pyramid0 {
> +               compatible = "gpio-leds";
> +
> +               nvme0 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme1 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme2 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme3 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme4 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme5 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme6 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme7 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca2 7 GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +
> +       leds-optional-dasd-pyramid1 {
> +               compatible = "gpio-leds";
> +
> +               nvme8 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme9 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme10 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme11 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme12 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme13 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme14 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme15 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +
> +       leds-optional-dasd-pyramid2 {
> +               compatible = "gpio-leds";
> +
> +               nvme16 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme17 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme18 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme19 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme20 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 4 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme21 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 5 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme22 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 6 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               nvme23 {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> +               };
> +       };
>  };
>
>  &ehci1 {
> @@ -2269,6 +2424,96 @@ eeprom@50 {
>                 compatible = "atmel,24c64";
>                 reg = <0x50>;
>         };
> +
> +       pca2: pca9552@60 {
> +               compatible = "nxp,pca9552";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c14 {
> @@ -2278,6 +2523,96 @@ eeprom@50 {
>                 compatible = "atmel,24c64";
>                 reg = <0x50>;
>         };
> +
> +       pca3: pca9552@60 {
> +               compatible = "nxp,pca9552";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c15 {
> @@ -2287,6 +2622,96 @@ eeprom@50 {
>                 compatible = "atmel,24c64";
>                 reg = <0x50>;
>         };
> +
> +       pca4: pca9552@60 {
> +               compatible = "nxp,pca9552";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &vuart1 {
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 09/35] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
  2021-03-08 22:53 ` [PATCH linux dev-5.10 09/35] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Eddie James
@ 2021-03-12  0:11   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:11 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>
> These are LEDs on the cable cards that plug into PCIE slots.
> The LEDs are controlled by pca9552 i2c expander

Again, use the PCA955x driver.

>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 264 +++++++++++++++++++
>  1 file changed, 264 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index c507e8da101e..3a9183bae259 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -789,6 +789,70 @@ nvme23 {
>                         gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
>                 };
>         };
> +
> +       leds-optional-cablecard0 {
> +               compatible = "gpio-leds";
> +
> +               cablecard0-cxp-top {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cablecard0-cxp-bot {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +
> +       leds-optional-cablecard3 {
> +               compatible = "gpio-leds";
> +
> +               cablecard3-cxp-top {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cablecard3-cxp-bot {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +
> +       leds-optional-cablecard4 {
> +               compatible = "gpio-leds";
> +
> +               cablecard4-cxp-top {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cablecard4-cxp-bot {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +
> +       leds-optional-cablecard10 {
> +               compatible = "gpio-leds";
> +
> +               cablecard10-cxp-top {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
> +               };
> +
> +               cablecard10-cxp-bot {
> +                       retain-state-shutdown;
> +                       default-state = "keep";
> +                       gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
> +               };
> +       };
>  };
>
>  &ehci1 {
> @@ -1541,6 +1605,56 @@ eeprom@52 {
>                 compatible = "atmel,24c64";
>                 reg = <0x52>;
>         };
> +
> +       pca5: pca9551@60 {
> +               compatible = "nxp,pca9551";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c5 {
> @@ -1565,6 +1679,106 @@ eeprom@51 {
>                 compatible = "atmel,24c64";
>                 reg = <0x51>;
>         };
> +
> +       pca6: pca9551@60 {
> +               compatible = "nxp,pca9551";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
> +
> +       pca7: pca9551@61 {
> +               compatible = "nxp,pca9551";
> +               reg = <0x61>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c6 {
> @@ -2411,6 +2625,56 @@ eeprom@51 {
>                 compatible = "atmel,24c64";
>                 reg = <0x51>;
>         };
> +
> +       pca8: pca9551@60 {
> +               compatible = "nxp,pca9551";
> +               reg = <0x60>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c12 {
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 10/35] ARM: dts: aspeed: rainier: Add presence GPIOs
  2021-03-08 22:53 ` [PATCH linux dev-5.10 10/35] ARM: dts: aspeed: rainier: Add presence GPIOs Eddie James
@ 2021-03-12  0:14   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:14 UTC (permalink / raw)
  To: Eddie James, Alpana Kumari; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Alpana Kumari <alpankum@in.ibm.com>
>
> This commit adds presence detect GPIO chips
> for various FRUs on Rainier.
>
> Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>

Eddie, you need to add your s-o-b when submitting someone else's
patches. You should also cc the author in this case.

Some comments below.

> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 169 ++++++++++++++++++-
>  1 file changed, 160 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 3a9183bae259..5ee87d749ce8 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -1535,20 +1535,64 @@ eeprom@51 {
>                 reg = <0x51>;
>         };
>
> -       tca9554@40 {
> +       tca_pres1: tca9554@20{

The label is unused, do you need to add it?

Is the address change intentional? You didn't mention it in the commit message.

>                 compatible = "ti,tca9554";
> -               reg = <0x40>;
> +               reg = <0x20>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
>                 gpio-controller;
>                 #gpio-cells = <2>;
>
> -               smbus0 {
> -                       gpio-hog;
> -                       gpios = <4 GPIO_ACTIVE_HIGH>;
> -                       output-high;
> -                       line-name = "smbus0";
> +               gpio-line-names = "",
> +                       "RUSSEL_FW_I2C_ENABLE_N",
> +                       "RUSSEL_OPPANEL_PRESENCE_N",
> +                       "BLYTH_OPPANEL_PRESENCE_N",
> +                       "CPU_TPM_CARD_PRESENT_N",
> +                       "DASD_BP2_PRESENT_N",
> +                       "DASD_BP1_PRESENT_N",
> +                       "DASD_BP0_PRESENT_N";
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
>                 };
> -       };
>
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c1 {
> @@ -1571,6 +1615,104 @@ power-supply@69 {
>                 compatible = "ibm,cffps";
>                 reg = <0x69>;
>         };
> +
> +       pca_pres1: pca9552@61 {
> +               compatible = "nxp,pca9552";
> +               reg = <0x61>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +
> +               gpio-line-names =
> +                       "SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD",
> +                       "SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD",
> +                       "SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N",
> +                       "SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N",
> +                       "SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N",
> +                       "", "", "", "", "", "";
> +
> +               gpio@0 {
> +                       reg = <0>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@1 {
> +                       reg = <1>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@2 {
> +                       reg = <2>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@3 {
> +                       reg = <3>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@4 {
> +                       reg = <4>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@5 {
> +                       reg = <5>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@6 {
> +                       reg = <6>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@7 {
> +                       reg = <7>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@8 {
> +                       reg = <8>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@9 {
> +                       reg = <9>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@10 {
> +                       reg = <10>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@11 {
> +                       reg = <11>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@12 {
> +                       reg = <12>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@13 {
> +                       reg = <13>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@14 {
> +                       reg = <14>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +
> +               gpio@15 {
> +                       reg = <15>;
> +                       type = <PCA955X_TYPE_GPIO>;
> +               };
> +       };
>  };
>
>  &i2c4 {
> @@ -2474,7 +2616,7 @@ eeprom@51 {
>                 reg = <0x51>;
>         };
>
> -       pca1: pca9552@61 {
> +       pca_pres3: pca9552@61 {
>                 compatible = "nxp,pca9552";
>                 reg = <0x61>;
>                 #address-cells = <1>;
> @@ -2482,6 +2624,15 @@ pca1: pca9552@61 {
>                 gpio-controller;
>                 #gpio-cells = <2>;
>
> +               gpio-line-names =
> +                       "SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD",
> +                       "SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD",
> +                       "SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD",
> +                       "SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N",
> +                       "SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N",
> +                       "SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N",
> +                       "", "", "", "";
> +
>                 gpio@0 {
>                         reg = <0>;
>                         type = <PCA955X_TYPE_GPIO>;
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 11/35] ARM: dts: aspeed: rainier: Mark controllers as restricted
  2021-03-08 22:53 ` [PATCH linux dev-5.10 11/35] ARM: dts: aspeed: rainier: Mark controllers as restricted Eddie James
@ 2021-03-12  0:15   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:15 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Joel Stanley <joel@jms.id.au>
>
> Some devices cannot use the loop command due to security requirements.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>

This is missing your s-o-b.

In this case I think I can assert that the patch comes from a
trustworthy source.

> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 5ee87d749ce8..85fb60d16fdf 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -1453,6 +1453,7 @@ eeprom@0 {
>
>                         cfam3_spi2: spi@40 {
>                                 reg = <0x40>;
> +                               compatible = "ibm,fsi2spi-restricted";
>                                 #address-cells = <1>;
>                                 #size-cells = <0>;
>
> @@ -1469,6 +1470,7 @@ eeprom@0 {
>
>                         cfam3_spi3: spi@60 {
>                                 reg = <0x60>;
> +                               compatible = "ibm,fsi2spi-restricted";
>                                 #address-cells = <1>;
>                                 #size-cells = <0>;
>
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 12/35] ARM: dts: aspeed: rainier 4U: Fix fan configuration
  2021-03-08 22:53 ` [PATCH linux dev-5.10 12/35] ARM: dts: aspeed: rainier 4U: Fix fan configuration Eddie James
@ 2021-03-12  0:17   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:17 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:56, Eddie James <eajames@linux.ibm.com> wrote:
>
> The 4U fans didn't have the correct properties since the fan nodes
> were redefined. Fix this by referencing each fan individually and
> adding the differences to the 4U fans.

Was this commit message for a different version of the patch? It
doesn't quite make sense to me.

If you go ahead with the common device tree approach, you could
consider only adding the dual-fan-tach property to machines that
support it (or not, depending on the common case).

>
> Signed-off-by: Eddie James <eajames@linux.ibm.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
> index 291f7d6c9979..f7fd3b3c90d0 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
> @@ -22,16 +22,30 @@ power-supply@6b {
>
>  &fan0 {
>         tach-pulses = <4>;
> +       /delete-property/ maxim,fan-dual-tach;
>  };
>
>  &fan1 {
>         tach-pulses = <4>;
> +       /delete-property/ maxim,fan-dual-tach;
>  };
>
>  &fan2 {
>         tach-pulses = <4>;
> +       /delete-property/ maxim,fan-dual-tach;
>  };
>
>  &fan3 {
>         tach-pulses = <4>;
> +       /delete-property/ maxim,fan-dual-tach;
> +};
> +
> +&fan4 {
> +       tach-pulses = <4>;
> +       /delete-property/ maxim,fan-dual-tach;
> +};
> +
> +&fan5 {
> +       tach-pulses = <4>;
> +       /delete-property/ maxim,fan-dual-tach;
>  };
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI
  2021-03-08 22:53 ` [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI Eddie James
@ 2021-03-12  0:19   ` Joel Stanley
  2021-04-12  3:21     ` Andrew Jeffery
  0 siblings, 1 reply; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:19 UTC (permalink / raw)
  To: Eddie James, Andrew Jeffery; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Andrew Jeffery <andrew@aj.id.au>
>
> Add properties to control the phase delay for input and output data
> sampling.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>

Andrew, can you please review this and the other mmc related device
tree changes in this series.

I'm particularly interested in the upstream state of these changes.

> ---
>  Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
> index 987b287f3bff..ebcb9ed4e308 100644
> --- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
> @@ -37,6 +37,14 @@ properties:
>    clocks:
>      maxItems: 1
>      description: The SD/SDIO controller clock gate
> +  "aspeed,input-phase":
> +    $ref: '/schemas/types.yaml#/definitions/uint32'
> +    description:
> +      The input clock phase delay value.
> +  "aspeed,output-phase":
> +    $ref: '/schemas/types.yaml#/definitions/uint32'
> +    description:
> +      The output clock phase delay value.
>
>  patternProperties:
>    "^sdhci@[0-9a-f]+$":
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 26/35] fsi: scom: Handle FSI2PIB timeout
  2021-03-08 22:54 ` [PATCH linux dev-5.10 26/35] fsi: scom: Handle FSI2PIB timeout Eddie James
@ 2021-03-12  0:20   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:20 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Joel Stanley <joel@jms.id.au>
>
> When the scom engine indicates a FSI2PIB timeout we can recover by
> writing any value to the the reset register.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>

This change is incorrect; the logic to do a recovery is already in the
driver. The code needs reworking to run the recovery when a PIB
timeout occurs.

> ---
>  drivers/fsi/fsi-scom.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c
> index b45bfab7b7f5..2356a80f7f04 100644
> --- a/drivers/fsi/fsi-scom.c
> +++ b/drivers/fsi/fsi-scom.c
> @@ -38,6 +38,15 @@
>  #define SCOM_STATUS_PIB_RESP_MASK      0x00007000
>  #define SCOM_STATUS_PIB_RESP_SHIFT     12
>
> +/* Values the SCOM_STATUS_PIB_RESP_MASK can take */
> +#define SCOM_PIB_ERR_XSCOM_BLOCKED     0x00004000
> +#define SCOM_PIB_ERR_CHIPLET_OFFLINE   0x00002000
> +#define SCOM_PIB_ERR_PARTIAL_GOOD      0x00006000
> +#define SCOM_PIB_ERR_INVALID_ADDR      0x00001000
> +#define SCOM_PIB_ERR_CLOCK             0x00005000
> +#define SCOM_PIB_ERR_HANDSHAKE         0x00003000
> +#define SCOM_PIB_ERR_TIMEOUT           0x00007000
> +
>  #define SCOM_STATUS_ANY_ERR            (SCOM_STATUS_PROTECTION | \
>                                          SCOM_STATUS_PARITY |     \
>                                          SCOM_STATUS_PIB_ABORT | \
> @@ -250,6 +259,15 @@ static int handle_fsi2pib_status(struct scom_device *scom, uint32_t status)
>         /* Return -EBUSY on PIB abort to force a retry */
>         if (status & SCOM_STATUS_PIB_ABORT)
>                 return -EBUSY;
> +
> +       if (status & SCOM_PIB_ERR_TIMEOUT) {
> +               dev_dbg(&scom->dev, "PIB timeout, recovering\n");
> +               fsi_device_write(scom->fsi_dev, SCOM_FSI2PIB_RESET_REG,
> +                                &dummy, sizeof(uint32_t));
> +               /* Return -EBUSY to force a retry */
> +               return -EBUSY;
> +       }
> +
>         return 0;
>  }
>
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* RE: [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  2021-03-08 22:53 ` [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Eddie James
  2021-03-12  0:09   ` Joel Stanley
@ 2021-03-12  0:21   ` Milton Miller II
  2021-03-12  0:30     ` Joel Stanley
  1 sibling, 1 reply; 61+ messages in thread
From: Milton Miller II @ 2021-03-12  0:21 UTC (permalink / raw)
  To: Joel Stanley; +Cc: OpenBMC Maillist, Eddie James



-----"openbmc" <openbmc-bounces+miltonm=us.ibm.com@lists.ozlabs.org> wrote: -----

>To: Eddie James <eajames@linux.ibm.com>
>From: Joel Stanley 
>Sent by: "openbmc" 
>Date: 03/11/2021 06:09PM
>Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>
>Subject: [EXTERNAL] Re: [PATCH linux dev-5.10 06/35] ARM: dts:
>aspeed: rainier: Add leds that are off PCA9552
>
>On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com>
>wrote:
>>
>> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>>
>> These LEDs are on the fans and are connected via a
>> pca9551 i2c expander
>
>This change doesn't make sense. The pca9551 is an i2c LED expander,
>so
>we don't need to expose the pins as GPIOs and then attach a gpio-leds
>driver to them. We should instead simply configure the pca955x driver
>to drive the LEDs as LEDs.

I'll refresh your memory on why we have been doing this in our 
devie trees and then let you consider if this is desired or not.

The led system insistes on creating a compact map (no holes) (as
does the reset subsystem).

However, this means the relative led number for a pin changes 
as the prior pins change from gpio to led configuration.

For example if pins 2 and 7 are leds, they become leds 0 and 1.  
Changing pin 5 to also be an led means that pin 7 is now led 2 
not led 1 on the led subsystem.

The workaround we have done for existing systems has been to use 
gpio leds for pca family devices.

milton

>
>>
>> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>> ---
>>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 41
>++++++++++++++++++++
>>  1 file changed, 41 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> index 6684485a2db0..514a14d3f914 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> @@ -263,6 +263,47 @@ fan5-presence {
>>                         linux,code = <11>;
>>                 };
>>         };
>> +
>> +       leds {
>> +               compatible = "gpio-leds";
>> +
>> +               fan0 {
>> +                       retain-state-shutdown;
>> +                       default-state = "keep";
>> +                       gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
>> +               };
>> +
>> +               fan1 {
>> +                       retain-state-shutdown;
>> +                       default-state = "keep";
>> +                       gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
>> +               };
>> +
>> +               fan2 {
>> +                       retain-state-shutdown;
>> +                       default-state = "keep";
>> +                       gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
>> +               };
>> +
>> +               fan3 {
>> +                       retain-state-shutdown;
>> +                       default-state = "keep";
>> +                       gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
>> +               };
>> +
>> +               fan4 {
>> +                       retain-state-shutdown;
>> +                       default-state = "keep";
>> +                       gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
>> +               };
>> +
>> +               fan5 {
>> +                       retain-state-shutdown;
>> +                       default-state = "keep";
>> +                       gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
>> +               };
>> +       };
>> +
>>  };
>>
>>  &ehci1 {
>> --
>> 2.27.0
>>
>
>


^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 30/35] hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag
  2021-03-08 22:54 ` [PATCH linux dev-5.10 30/35] hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag Eddie James
@ 2021-03-12  0:23   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:23 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:56, Eddie James <eajames@linux.ibm.com> wrote:
>
> Several power supplies supported by the IBM CFFPS driver don't
> report valid data in the CAPABILITY register. This results in PEC
> being enabled when it's not supported by the device, and since
> the automatic version detection might fail, disable use of the
> CAPABILITY register across the board for this driver.
>
> Signed-off-by: Eddie James <eajames@linux.ibm.com>
> Link: https://lore.kernel.org/r/20201222152640.27749-3-eajames@linux.ibm.com
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>

I have applied the commits to this driver that have been made upstream:


f7a652182cc7 hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag
3bce071a301f hwmon: (pmbus) shrink code and remove pmbus_do_remove()

> ---
>  drivers/hwmon/pmbus/ibm-cffps.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c
> index 2fb7540ee952..f7bb7bebe045 100644
> --- a/drivers/hwmon/pmbus/ibm-cffps.c
> +++ b/drivers/hwmon/pmbus/ibm-cffps.c
> @@ -472,7 +472,7 @@ static struct pmbus_driver_info ibm_cffps_info[] = {
>  };
>
>  static struct pmbus_platform_data ibm_cffps_pdata = {
> -       .flags = PMBUS_SKIP_STATUS_CHECK,
> +       .flags = PMBUS_SKIP_STATUS_CHECK | PMBUS_NO_CAPABILITY,
>  };
>
>  static int ibm_cffps_probe(struct i2c_client *client)
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  2021-03-12  0:21   ` Milton Miller II
@ 2021-03-12  0:30     ` Joel Stanley
       [not found]       ` <6ACEC474-8CFD-4BA9-B8FF-CCD41007AA67@linux.vnet.ibm.com>
  0 siblings, 1 reply; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:30 UTC (permalink / raw)
  To: Milton Miller II; +Cc: OpenBMC Maillist, Eddie James

On Fri, 12 Mar 2021 at 00:21, Milton Miller II <miltonm@us.ibm.com> wrote:
>
>
>
> -----"openbmc" <openbmc-bounces+miltonm=us.ibm.com@lists.ozlabs.org> wrote: -----
>
> >To: Eddie James <eajames@linux.ibm.com>
> >From: Joel Stanley
> >Sent by: "openbmc"
> >Date: 03/11/2021 06:09PM
> >Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>
> >Subject: [EXTERNAL] Re: [PATCH linux dev-5.10 06/35] ARM: dts:
> >aspeed: rainier: Add leds that are off PCA9552
> >
> >On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com>
> >wrote:
> >>
> >> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> >>
> >> These LEDs are on the fans and are connected via a
> >> pca9551 i2c expander
> >
> >This change doesn't make sense. The pca9551 is an i2c LED expander,
> >so
> >we don't need to expose the pins as GPIOs and then attach a gpio-leds
> >driver to them. We should instead simply configure the pca955x driver
> >to drive the LEDs as LEDs.
>
> I'll refresh your memory on why we have been doing this in our
> devie trees and then let you consider if this is desired or not.
>
> The led system insistes on creating a compact map (no holes) (as
> does the reset subsystem).
>
> However, this means the relative led number for a pin changes
> as the prior pins change from gpio to led configuration.
>
> For example if pins 2 and 7 are leds, they become leds 0 and 1.
> Changing pin 5 to also be an led means that pin 7 is now led 2
> not led 1 on the led subsystem.

Thanks for the rationale reminder.

Are these led numbers important to userspace, or does the renumbering
affect device tree changes only?

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 27/35] net/ncsi: Avoid channel_monitor hrtimer deadlock
  2021-03-08 22:54 ` [PATCH linux dev-5.10 27/35] net/ncsi: Avoid channel_monitor hrtimer deadlock Eddie James
@ 2021-03-12  0:35   ` Joel Stanley
  0 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:35 UTC (permalink / raw)
  To: Eddie James, Milton Miller II; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:56, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Milton Miller <miltonm@us.ibm.com>
>
> Calling ncsi_stop_channel_monitor from channel_monitor is a guaranteed
> deadlock on SMP because stop calls del_timer_sync on the timer that
> inoked channel_monitor as its timer function.
>
> Recognise the inherent race of marking the monitor disabled before
> deleting the timer by just returning if enable was cleared.  After
> a timeout (the default case -- reset to START when response recieved)
> just mark the monitor.enabled false.
>
> If the channel has an entrie on the channel_queue list, or if the the
> state is not ACTIVE or INACTIVE, then warn and mark the timer stopped
> and don't restart, as the locking is broken somehow.
>
> Fixes: 0795fb2021f0 ("net/ncsi: Stop monitor if channel times out or is inactive")
> Signed-off-by: Milton Miller <miltonm@us.ibm.com>

Please send upstream for review.


> ---
>  net/ncsi/ncsi-manage.c | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/net/ncsi/ncsi-manage.c b/net/ncsi/ncsi-manage.c
> index a9cb355324d1..5a2beaf874c7 100644
> --- a/net/ncsi/ncsi-manage.c
> +++ b/net/ncsi/ncsi-manage.c
> @@ -105,13 +105,20 @@ static void ncsi_channel_monitor(struct timer_list *t)
>         monitor_state = nc->monitor.state;
>         spin_unlock_irqrestore(&nc->lock, flags);
>
> -       if (!enabled || chained) {
> -               ncsi_stop_channel_monitor(nc);
> -               return;
> +       if (!enabled)
> +               return;         /* expected race disabling timer */
> +       if (WARN_ON_ONCE(chained)) {
> +               goto bad_state;
>         }
>         if (state != NCSI_CHANNEL_INACTIVE &&
>             state != NCSI_CHANNEL_ACTIVE) {
> -               ncsi_stop_channel_monitor(nc);
> +bad_state:
> +               netdev_warn(ndp->ndev.dev,
> +                           "Bad NCSI monitor state channel %d 0x%x %s queue\n",
> +                           nc->id, state, chained ? "on" : "off");
> +               spin_lock_irqsave(&nc->lock, flags);
> +               nc->monitor.enabled = false;
> +               spin_unlock_irqrestore(&nc->lock, flags);
>                 return;
>         }
>
> @@ -136,10 +143,9 @@ static void ncsi_channel_monitor(struct timer_list *t)
>                 ncsi_report_link(ndp, true);
>                 ndp->flags |= NCSI_DEV_RESHUFFLE;
>
> -               ncsi_stop_channel_monitor(nc);
> -
>                 ncm = &nc->modes[NCSI_MODE_LINK];
>                 spin_lock_irqsave(&nc->lock, flags);
> +               nc->monitor.enabled = false;
>                 nc->state = NCSI_CHANNEL_INVISIBLE;
>                 ncm->data[2] &= ~0x1;
>                 spin_unlock_irqrestore(&nc->lock, flags);
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page()
  2021-03-08 22:54 ` [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page() Eddie James
  2021-03-09 20:21   ` Andrei Kartashev
@ 2021-03-12  0:35   ` Joel Stanley
  1 sibling, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:35 UTC (permalink / raw)
  To: Eddie James, Andrew Jeffery; +Cc: OpenBMC Maillist

On Mon, 8 Mar 2021 at 22:56, Eddie James <eajames@linux.ibm.com> wrote:
>
> From: Andrew Jeffery <andrew@aj.id.au>
>
> From extensive testing and tracing it was discovered that the MAX31785
> occasionally fails to switch pages despite ACK'ing the PAGE PMBus data
> write. I suspect this behaviour had been seen on other devices as well,
> as pmbus_set_page() already read-back the freshly set value and errored
> out if it wasn't what we requested.
>
> In the case of the MAX31785 it was shown that a one-shot retry was
> enough to get the PAGE write to stick if the inital command failed. To
> improve robustness, only error out if the one-shot retry also fails to
> stick.
>
> OpenBMC-Staging-Count: 1
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> Signed-off-by: Joel Stanley <joel@jms.id.au>

Andrew, please review the pmbus related changes and let me know how
you would like to proceed.

> ---
>  drivers/hwmon/pmbus/pmbus_core.c | 31 ++++++++++++++++++++-----------
>  1 file changed, 20 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
> index 44c1a0a07509..dd4a09d18730 100644
> --- a/drivers/hwmon/pmbus/pmbus_core.c
> +++ b/drivers/hwmon/pmbus/pmbus_core.c
> @@ -151,25 +151,34 @@ int pmbus_set_page(struct i2c_client *client, int page, int phase)
>
>         if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
>             data->info->pages > 1 && page != data->currpage) {
> +               int i;
> +
>                 dev_dbg(&client->dev, "Want page %u, %u cached\n", page,
>                         data->currpage);
>
> -               rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
> -               if (rv < 0) {
> +               for (i = 0; i < 2; i++) {
>                         rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE,
>                                                        page);
> -                       dev_dbg(&client->dev,
> -                               "Failed to set page %u, performed one-shot retry %s: %d\n",
> -                               page, rv ? "and failed" : "with success", rv);
> +                       if (rv)
> +                               continue;
> +
> +                       rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
>                         if (rv < 0)
> -                               return rv;
> -               }
> +                               continue;
>
> -               rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
> -               if (rv < 0)
> -                       return rv;
> +                       /* Success, exit loop */
> +                       if (rv == page)
> +                               break;
> +
> +                       rv = i2c_smbus_read_byte_data(client, PMBUS_STATUS_CML);
> +                       if (rv < 0)
> +                               continue;
> +
> +                       if (rv & PB_CML_FAULT_INVALID_DATA)
> +                               return -EIO;
> +               }
>
> -               if (rv != page)
> +               if (i == 2)
>                         return -EIO;
>         }
>         data->currpage = page;
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 00/35] Rainier and Everest system updates
  2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
                   ` (34 preceding siblings ...)
  2021-03-08 22:54 ` [PATCH linux dev-5.10 35/35] pmbus: (max31785) Retry enabling fans after writing MFR_FAN_CONFIG Eddie James
@ 2021-03-12  0:37 ` Joel Stanley
  35 siblings, 0 replies; 61+ messages in thread
From: Joel Stanley @ 2021-03-12  0:37 UTC (permalink / raw)
  To: Eddie James; +Cc: OpenBMC Maillist

Hi Eddie,

On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
>
> This lengthy series updates device trees and drivers for the AST2600
> systems Rainier and Everest.

This is an unrelated collection of changes that really shouldn't be
submitted as a single patchset.

Please consider my suggestion for a common rainier/everest device tree
and re-submit those changes.

I've merged the changes that I have added reviewed-by tags to, and
backported the pmbus change.

For future revisions please consider sending the patches to mainline
for review and integration. We can then apply them to the openbmc
tree.

Cheers,

Joel



>
> Patches 1-12 update the Rainier device tree. These changes are well
> tested.
> Patches 13-15 provide some eMMC improvements.
> Patch 16 fixes an observed problem on the Tacoma system.
> Patches 17-24 update the Everest device tree. These changes are
> somewhat tested in simulation and minimally tested on hardware.
> Patch 25 adds device trees for the second version of the Rainier
> BMC board.
> Patches 26-35 are device driver fixes and improvments. Some have
> already been accepted in linux-next.
>
> Alpana Kumari (3):
>   ARM: dts: aspeed: rainier: Add presence GPIOs
>   ARM: dts: aspeed: everest: GPIOs support
>   ARM: dts: aspeed: rainier: Support pass 2 planar
>
> Andrew Jeffery (8):
>   dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI
>   mmc: sdhci: aspeed: Expose data sample phase delay tuning
>   ARM: dts: aspeed: tacoma: Add data sample phase delay for eMMC
>   i2c: Allow throttling of transfers to client devices
>   pmbus: (ucd9000) Throttle SMBus transfers to avoid poor behaviour
>   pmbus: (core) Add a one-shot retry in pmbus_set_page()
>   pmbus: (max31785) Add a local pmbus_set_page() implementation
>   pmbus: (max31785) Retry enabling fans after writing MFR_FAN_CONFIG
>
> Brandon Wyman (2):
>   ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans
>   ARM: dts: aspeed: everest: Add power supply i2c devices
>
> Dylan Hung (1):
>   ftgmac100: Restart MAC HW once
>
> Eddie James (7):
>   ARM: dts: aspeed: rainier: Add additional processor CFAMs
>   ARM: dts: aspeed: rainier 4U: Fix fan configuration
>   ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO
>   ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines
>   ARM: dts: Aspeed: Everest: Add RTC
>   hwmon: (pmbus) Add a PMBUS_NO_CAPABILITY platform data flag
>   hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag
>
> Jim Wright (1):
>   ARM: dts: aspeed: everest: Add UCD90320 power sequencer
>
> Joel Stanley (2):
>   ARM: dts: aspeed: rainier: Mark controllers as restricted
>   fsi: scom: Handle FSI2PIB timeout
>
> Matthew Barth (3):
>   ARM: dts: aspeed: rainier: Set MAX31785 config
>   ARM: dts: Aspeed: Everest: Add max31785 fan controller device
>   ARM: dts: Aspeed: Everest: Add pca9552 fan presence
>
> Milton Miller (1):
>   net/ncsi: Avoid channel_monitor hrtimer deadlock
>
> PriyangaRamasamy (1):
>   ARM: dts: aspeed: Everest: Add I2C components
>
> Vishwanatha Subbanna (6):
>   ARM: dts: aspeed: rainier: Add Operator Panel LEDs
>   ARM: dts: aspeed: rainier: Add directly controlled LEDs
>   ARM: dts: aspeed: rainier: Add leds that are off PCA9552
>   ARM: dts: aspeed: rainier: Add leds that are off pic16f882
>   ARM: dts: aspeed: rainier: Add leds on optional DASD cards
>   ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable
>     cards
>
>  .../devicetree/bindings/mmc/aspeed,sdhci.yaml |    8 +
>  arch/arm/boot/dts/Makefile                    |    2 +
>  arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts  | 1756 +++++++++++-
>  .../boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts |  198 ++
>  .../boot/dts/aspeed-bmc-ibm-rainier-4u.dts    |   14 +
>  .../boot/dts/aspeed-bmc-ibm-rainier-v2.dts    |  198 ++
>  arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts  | 2411 +++++++++++++++--
>  arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts   |    3 +-
>  drivers/fsi/fsi-scom.c                        |   18 +
>  drivers/hwmon/pmbus/ibm-cffps.c               |    2 +-
>  drivers/hwmon/pmbus/max31785.c                |   55 +-
>  drivers/hwmon/pmbus/pmbus_core.c              |   39 +-
>  drivers/hwmon/pmbus/ucd9000.c                 |    4 +
>  drivers/i2c/i2c-core-base.c                   |    8 +-
>  drivers/i2c/i2c-core-smbus.c                  |  169 +-
>  drivers/i2c/i2c-core.h                        |   21 +
>  drivers/mmc/host/sdhci-of-aspeed.c            |   65 +-
>  drivers/net/ethernet/faraday/ftgmac100.c      |    1 +
>  include/linux/i2c.h                           |    5 +
>  include/linux/pmbus.h                         |    9 +
>  net/ncsi/ncsi-manage.c                        |   18 +-
>  21 files changed, 4662 insertions(+), 342 deletions(-)
>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u-v2.dts
>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-rainier-v2.dts
>
> --
> 2.27.0
>

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
       [not found]       ` <6ACEC474-8CFD-4BA9-B8FF-CCD41007AA67@linux.vnet.ibm.com>
@ 2021-03-24 23:43         ` Joel Stanley
  2021-04-26  5:59           ` vishwanatha subbanna
  0 siblings, 1 reply; 61+ messages in thread
From: Joel Stanley @ 2021-03-24 23:43 UTC (permalink / raw)
  To: vishwanatha subbanna; +Cc: OpenBMC Maillist, Eddie James

On Fri, 12 Mar 2021 at 07:05, vishwanatha subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
>
>
> On 12-Mar-2021, at 6:00 AM, Joel Stanley <joel@jms.id.au> wrote:
>
> On Fri, 12 Mar 2021 at 00:21, Milton Miller II <miltonm@us.ibm.com> wrote:
>
>
>
>
> -----"openbmc" <openbmc-bounces+miltonm=us.ibm.com@lists.ozlabs.org> wrote: -----
>
> To: Eddie James <eajames@linux.ibm.com>
> From: Joel Stanley
> Sent by: "openbmc"
> Date: 03/11/2021 06:09PM
> Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>
> Subject: [EXTERNAL] Re: [PATCH linux dev-5.10 06/35] ARM: dts:
> aspeed: rainier: Add leds that are off PCA9552
>
> On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com>
> wrote:
>
>
> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>
> These LEDs are on the fans and are connected via a
> pca9551 i2c expander
>
>
> This change doesn't make sense. The pca9551 is an i2c LED expander,
> so
> we don't need to expose the pins as GPIOs and then attach a gpio-leds
> driver to them. We should instead simply configure the pca955x driver
> to drive the LEDs as LEDs.
>
>
> I'll refresh your memory on why we have been doing this in our
> devie trees and then let you consider if this is desired or not.
>
> The led system insistes on creating a compact map (no holes) (as
> does the reset subsystem).
>
> However, this means the relative led number for a pin changes
> as the prior pins change from gpio to led configuration.
>
> For example if pins 2 and 7 are leds, they become leds 0 and 1.
> Changing pin 5 to also be an led means that pin 7 is now led 2
> not led 1 on the led subsystem.
>
>
> Thanks for the rationale reminder.
>
> Are these led numbers important to userspace, or does the renumbering
> affect device tree changes only?
>
>
>
> Here are my technical needs.
> - I need these LEDs associated with names and this __must not__ change
> - I need those LEDs represented as `/sys/class/leds/<$name>`
>
> What can I do :
> - use `leds-gpio` like how it’s done today
>
> OR
>
> - Use “label” in PCA955X_TYPE_LED
>    - However, putting this label, it results in `/sys/class/leds/pca955x:<$label>`. As opposed to `/sys/class/leds/<$label>`.
>
> Is there a way where I can get `/sys/class/leds/<$label>` ?. I did not get this from the documentation. Seeing pca955x on 100 entries seems a noise

The prefix has been present in the driver since it was introduced in
2008. Is there any reason we can't have userspace ignore the pca955x
prefix?

Cheers,

Joel

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI
  2021-03-12  0:19   ` Joel Stanley
@ 2021-04-12  3:21     ` Andrew Jeffery
  0 siblings, 0 replies; 61+ messages in thread
From: Andrew Jeffery @ 2021-04-12  3:21 UTC (permalink / raw)
  To: Joel Stanley, Eddie James; +Cc: OpenBMC Maillist



On Fri, 12 Mar 2021, at 10:49, Joel Stanley wrote:
> On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com> wrote:
> >
> > From: Andrew Jeffery <andrew@aj.id.au>
> >
> > Add properties to control the phase delay for input and output data
> > sampling.
> >
> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> 
> Andrew, can you please review this and the other mmc related device
> tree changes in this series.
> 
> I'm particularly interested in the upstream state of these changes.

I've got MMC phase support for the Aspeed driver upstream in 5.12. We 
should backport those changes instead.

Andrew

^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  2021-03-24 23:43         ` Joel Stanley
@ 2021-04-26  5:59           ` vishwanatha subbanna
  2021-04-27 21:22             ` Jacek Anaszewski
  0 siblings, 1 reply; 61+ messages in thread
From: vishwanatha subbanna @ 2021-04-26  5:59 UTC (permalink / raw)
  To: Joel Stanley, Andrew Jeffery, Jacek Anaszewski, linux-leds
  Cc: OpenBMC Maillist, Eddie James

Joel,

With the experiments that I have done, I can not express LEDs with PCA955X_TYPE_LED predominantly because LEDs won’t
retain states after the BMC reboot. I cooked a patch and tried but it does not work. I did an experiment where
I put the patch and then did a reboot and saw that the LEDs were [OFF] in the very early stage of probe itself.

From a9fe9e956c624c15a455b88cc05262358519a541 Mon Sep 17 00:00:00 2001
From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Date: Fri, 23 Apr 2021 06:57:56 -0500
Subject: [PATCH 1/2] leds: pca955x: Add support for default-state

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
 drivers/leds/leds-pca955x.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/leds/leds-pca955x.c b/drivers/leds/leds-pca955x.c
index bf7ead4..987415b 100644
--- a/drivers/leds/leds-pca955x.c
+++ b/drivers/leds/leds-pca955x.c
@@ -130,6 +130,7 @@ struct pca955x_led {
 	char			name[32];
 	u32			type;
 	const char		*default_trigger;
+	const char		*default_state;
 };
 
 struct pca955x_platform_data {
@@ -408,6 +409,8 @@ static int pca955x_gpio_direction_output(struct gpio_chip *gc,
 		fwnode_property_read_u32(child, "type", &pdata->leds[reg].type);
 		fwnode_property_read_string(child, "linux,default-trigger",
 					&pdata->leds[reg].default_trigger);
+		fwnode_property_read_string(child, "default-state",
+					&pdata->leds[reg].default_state);
 	}
 
 	pdata->num_leds = chip->bits;
@@ -520,8 +523,13 @@ static int pca955x_probe(struct i2c_client *client,
 			if (err)
 				return err;
 
-			/* Turn off LED */
-			err = pca955x_led_set(&pca955x_led->led_cdev, LED_OFF);
+			/* If the default-state is "keep", don't change states */
+			if (strcmp(pdata->leds[i].default_state, "keep")) {
+				if (!strcmp(pdata->leds[i].default_state, "on"))
+					err = pca955x_led_set(&pca955x_led->led_cdev, LED_ON);
+				else
+					err = pca955x_led_set(&pca955x_led->led_cdev, LED_OFF);
+			}
 			if (err)
 				return err;
 		}
— 
1.8.3.1


For `leds-gpio`, Andrew had put a patch, but I don’t see how that can be mapped to PCA955X. https://github.com/torvalds/linux/commit/f5808ac158f2b16b686a3d3c0879c5d6048aba14

Jacek, 

Please could you help me here ?.. I need to express LEDs as PCA955X_TYPE_LED and also retain states post BMC reboot.

Thank you,
!! Vishwa !!

> On 25-Mar-2021, at 5:13 AM, Joel Stanley <joel@jms.id.au> wrote:
> 
> On Fri, 12 Mar 2021 at 07:05, vishwanatha subbanna
> <vishwa@linux.vnet.ibm.com> wrote:
>> 
>> 
>> 
>> On 12-Mar-2021, at 6:00 AM, Joel Stanley <joel@jms.id.au> wrote:
>> 
>> On Fri, 12 Mar 2021 at 00:21, Milton Miller II <miltonm@us.ibm.com> wrote:
>> 
>> 
>> 
>> 
>> -----"openbmc" <openbmc-bounces+miltonm=us.ibm.com@lists.ozlabs.org> wrote: -----
>> 
>> To: Eddie James <eajames@linux.ibm.com>
>> From: Joel Stanley
>> Sent by: "openbmc"
>> Date: 03/11/2021 06:09PM
>> Cc: OpenBMC Maillist <openbmc@lists.ozlabs.org>
>> Subject: [EXTERNAL] Re: [PATCH linux dev-5.10 06/35] ARM: dts:
>> aspeed: rainier: Add leds that are off PCA9552
>> 
>> On Mon, 8 Mar 2021 at 22:54, Eddie James <eajames@linux.ibm.com>
>> wrote:
>> 
>> 
>> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>> 
>> These LEDs are on the fans and are connected via a
>> pca9551 i2c expander
>> 
>> 
>> This change doesn't make sense. The pca9551 is an i2c LED expander,
>> so
>> we don't need to expose the pins as GPIOs and then attach a gpio-leds
>> driver to them. We should instead simply configure the pca955x driver
>> to drive the LEDs as LEDs.
>> 
>> 
>> I'll refresh your memory on why we have been doing this in our
>> devie trees and then let you consider if this is desired or not.
>> 
>> The led system insistes on creating a compact map (no holes) (as
>> does the reset subsystem).
>> 
>> However, this means the relative led number for a pin changes
>> as the prior pins change from gpio to led configuration.
>> 
>> For example if pins 2 and 7 are leds, they become leds 0 and 1.
>> Changing pin 5 to also be an led means that pin 7 is now led 2
>> not led 1 on the led subsystem.
>> 
>> 
>> Thanks for the rationale reminder.
>> 
>> Are these led numbers important to userspace, or does the renumbering
>> affect device tree changes only?
>> 
>> 
>> 
>> Here are my technical needs.
>> - I need these LEDs associated with names and this __must not__ change
>> - I need those LEDs represented as `/sys/class/leds/<$name>`
>> 
>> What can I do :
>> - use `leds-gpio` like how it’s done today
>> 
>> OR
>> 
>> - Use “label” in PCA955X_TYPE_LED
>>   - However, putting this label, it results in `/sys/class/leds/pca955x:<$label>`. As opposed to `/sys/class/leds/<$label>`.
>> 
>> Is there a way where I can get `/sys/class/leds/<$label>` ?. I did not get this from the documentation. Seeing pca955x on 100 entries seems a noise
> 
> The prefix has been present in the driver since it was introduced in
> 2008. Is there any reason we can't have userspace ignore the pca955x
> prefix?
> 
> Cheers,
> 
> Joel


^ permalink raw reply	[flat|nested] 61+ messages in thread

* Re: [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
  2021-04-26  5:59           ` vishwanatha subbanna
@ 2021-04-27 21:22             ` Jacek Anaszewski
  0 siblings, 0 replies; 61+ messages in thread
From: Jacek Anaszewski @ 2021-04-27 21:22 UTC (permalink / raw)
  To: vishwanatha subbanna, Joel Stanley, Andrew Jeffery, linux-leds
  Cc: OpenBMC Maillist, Eddie James

Hi Vishwanatha,

On 4/26/21 7:59 AM, vishwanatha subbanna wrote:
> Joel,
> 
> With the experiments that I have done, I can not express LEDs with PCA955X_TYPE_LED predominantly because LEDs won’t
> retain states after the BMC reboot. I cooked a patch and tried but it does not work. I did an experiment where
> I put the patch and then did a reboot and saw that the LEDs were [OFF] in the very early stage of probe itself.
> 
>>From a9fe9e956c624c15a455b88cc05262358519a541 Mon Sep 17 00:00:00 2001
> From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> Date: Fri, 23 Apr 2021 06:57:56 -0500
> Subject: [PATCH 1/2] leds: pca955x: Add support for default-state
> 
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
>   drivers/leds/leds-pca955x.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/leds/leds-pca955x.c b/drivers/leds/leds-pca955x.c
> index bf7ead4..987415b 100644
> --- a/drivers/leds/leds-pca955x.c
> +++ b/drivers/leds/leds-pca955x.c
> @@ -130,6 +130,7 @@ struct pca955x_led {
>   	char			name[32];
>   	u32			type;
>   	const char		*default_trigger;
> +	const char		*default_state;
>   };
>   
>   struct pca955x_platform_data {
> @@ -408,6 +409,8 @@ static int pca955x_gpio_direction_output(struct gpio_chip *gc,
>   		fwnode_property_read_u32(child, "type", &pdata->leds[reg].type);
>   		fwnode_property_read_string(child, "linux,default-trigger",
>   					&pdata->leds[reg].default_trigger);
> +		fwnode_property_read_string(child, "default-state",
> +					&pdata->leds[reg].default_state);
>   	}
>   
>   	pdata->num_leds = chip->bits;
> @@ -520,8 +523,13 @@ static int pca955x_probe(struct i2c_client *client,
>   			if (err)
>   				return err;
>   
> -			/* Turn off LED */
> -			err = pca955x_led_set(&pca955x_led->led_cdev, LED_OFF);
> +			/* If the default-state is "keep", don't change states */
> +			if (strcmp(pdata->leds[i].default_state, "keep")) {
> +				if (!strcmp(pdata->leds[i].default_state, "on"))
> +					err = pca955x_led_set(&pca955x_led->led_cdev, LED_ON);
> +				else
> +					err = pca955x_led_set(&pca955x_led->led_cdev, LED_OFF);
> +			}
>   			if (err)
>   				return err;
>   		}
> —
> 1.8.3.1
> 
> 
> For `leds-gpio`, Andrew had put a patch, but I don’t see how that can be mapped to PCA955X. https://github.com/torvalds/linux/commit/f5808ac158f2b16b686a3d3c0879c5d6048aba14
> 
> Jacek,
> 
> Please could you help me here ?.. I need to express LEDs as PCA955X_TYPE_LED and also retain states post BMC reboot.

If in your setup the LED controller loses power on reboot then there
is nothing you can do to retain the state.

-- 
Best regards,
Jacek Anaszewski

^ permalink raw reply	[flat|nested] 61+ messages in thread

end of thread, other threads:[~2021-04-27 21:23 UTC | newest]

Thread overview: 61+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-08 22:53 [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Eddie James
2021-03-08 22:53 ` [PATCH linux dev-5.10 01/35] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Eddie James
2021-03-12  0:05   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 02/35] ARM: dts: aspeed: rainier: Add directly controlled LEDs Eddie James
2021-03-12  0:04   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 03/35] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans Eddie James
2021-03-12  0:06   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 04/35] ARM: dts: aspeed: rainier: Set MAX31785 config Eddie James
2021-03-12  0:07   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 05/35] ARM: dts: aspeed: rainier: Add additional processor CFAMs Eddie James
2021-03-12  0:07   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 06/35] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Eddie James
2021-03-12  0:09   ` Joel Stanley
2021-03-12  0:21   ` Milton Miller II
2021-03-12  0:30     ` Joel Stanley
     [not found]       ` <6ACEC474-8CFD-4BA9-B8FF-CCD41007AA67@linux.vnet.ibm.com>
2021-03-24 23:43         ` Joel Stanley
2021-04-26  5:59           ` vishwanatha subbanna
2021-04-27 21:22             ` Jacek Anaszewski
2021-03-08 22:53 ` [PATCH linux dev-5.10 07/35] ARM: dts: aspeed: rainier: Add leds that are off pic16f882 Eddie James
2021-03-12  0:10   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 08/35] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Eddie James
2021-03-12  0:10   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 09/35] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Eddie James
2021-03-12  0:11   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 10/35] ARM: dts: aspeed: rainier: Add presence GPIOs Eddie James
2021-03-12  0:14   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 11/35] ARM: dts: aspeed: rainier: Mark controllers as restricted Eddie James
2021-03-12  0:15   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 12/35] ARM: dts: aspeed: rainier 4U: Fix fan configuration Eddie James
2021-03-12  0:17   ` Joel Stanley
2021-03-08 22:53 ` [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI Eddie James
2021-03-12  0:19   ` Joel Stanley
2021-04-12  3:21     ` Andrew Jeffery
2021-03-08 22:53 ` [PATCH linux dev-5.10 14/35] mmc: sdhci: aspeed: Expose data sample phase delay tuning Eddie James
2021-03-08 22:53 ` [PATCH linux dev-5.10 15/35] ARM: dts: aspeed: tacoma: Add data sample phase delay for eMMC Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 16/35] ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 17/35] ARM: dts: aspeed: Everest: Add I2C components Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 18/35] ARM: dts: Aspeed: Everest: Add max31785 fan controller device Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 19/35] ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 20/35] ARM: dts: Aspeed: Everest: Add pca9552 fan presence Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 21/35] ARM: dts: aspeed: everest: Add power supply i2c devices Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 22/35] ARM: dts: aspeed: everest: Add UCD90320 power sequencer Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 23/35] ARM: dts: aspeed: everest: GPIOs support Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 24/35] ARM: dts: Aspeed: Everest: Add RTC Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 25/35] ARM: dts: aspeed: rainier: Support pass 2 planar Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 26/35] fsi: scom: Handle FSI2PIB timeout Eddie James
2021-03-12  0:20   ` Joel Stanley
2021-03-08 22:54 ` [PATCH linux dev-5.10 27/35] net/ncsi: Avoid channel_monitor hrtimer deadlock Eddie James
2021-03-12  0:35   ` Joel Stanley
2021-03-08 22:54 ` [PATCH linux dev-5.10 28/35] ftgmac100: Restart MAC HW once Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 29/35] hwmon: (pmbus) Add a PMBUS_NO_CAPABILITY platform data flag Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 30/35] hwmon: (pmbus/ibm-cffps) Set the PMBUS_NO_CAPABILITY flag Eddie James
2021-03-12  0:23   ` Joel Stanley
2021-03-08 22:54 ` [PATCH linux dev-5.10 31/35] i2c: Allow throttling of transfers to client devices Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 32/35] pmbus: (ucd9000) Throttle SMBus transfers to avoid poor behaviour Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 33/35] pmbus: (core) Add a one-shot retry in pmbus_set_page() Eddie James
2021-03-09 20:21   ` Andrei Kartashev
2021-03-12  0:35   ` Joel Stanley
2021-03-08 22:54 ` [PATCH linux dev-5.10 34/35] pmbus: (max31785) Add a local pmbus_set_page() implementation Eddie James
2021-03-08 22:54 ` [PATCH linux dev-5.10 35/35] pmbus: (max31785) Retry enabling fans after writing MFR_FAN_CONFIG Eddie James
2021-03-12  0:37 ` [PATCH linux dev-5.10 00/35] Rainier and Everest system updates Joel Stanley

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