From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C1F0C6FD1D for ; Wed, 22 Mar 2023 00:21:39 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4Ph8KY4wJyz2xkm for ; Wed, 22 Mar 2023 11:21:37 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=drut-io.20210112.gappssmtp.com header.i=@drut-io.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=COsD970E; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=drut.io (client-ip=2607:f8b0:4864:20::82b; helo=mail-qt1-x82b.google.com; envelope-from=abhishek@drut.io; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=drut-io.20210112.gappssmtp.com header.i=@drut-io.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=COsD970E; dkim-atps=neutral Received: from mail-qt1-x82b.google.com (mail-qt1-x82b.google.com [IPv6:2607:f8b0:4864:20::82b]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4PdWdK6rnZz2xkm for ; Sat, 18 Mar 2023 04:41:09 +1100 (AEDT) Received: by mail-qt1-x82b.google.com with SMTP id d7so6418480qtr.12 for ; Fri, 17 Mar 2023 10:41:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=drut-io.20210112.gappssmtp.com; s=20210112; t=1679074866; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=o5lpx7oRxPc+5X8D+oKotGep8zO6LjYAzsmwQ4EzQJ4=; b=COsD970Eg1TfDqApEvA0vrHbpnSmWkSBmf9O2AmPgXSg0P4olzODuuFgaaKs8khlVh pxfhljseXSHFfmdg0Cp4WcBn/YgH6+ImIEYFXnGUBl5qkLiE8b+OaPtXATjK6TTfG2vp BoxkCON4bKJmc/Z5BvxPSoTE7iaMSAsDTmk8ArQjxXV6hKz0SpheL9oKC7SzlZV8TzYb ynqdBGutXlo149HuOXIGeERi853HTMZ7wnL63+/GdcCRLUNaw1ihCuKL2gumtodK482i ABucXu1m6EQSyzJDtxHMEOsYn0IhXM1UAkEBEwjSx9knlBeyf1Iy8I2gmtmxoOv3+Q3K q0/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679074866; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=o5lpx7oRxPc+5X8D+oKotGep8zO6LjYAzsmwQ4EzQJ4=; b=uPLZup6rL+1EBZllBm8CM9u1WUYmx5xdANa+RuK7NRNDEFJV0YDGrnQlw7eIpR7BoZ 7Qp6vfU1fg/Mvfg/D8r/KAy3MhD2WkCK8/T4D3e3BPWdTUgJN5V1h7GbFcZuT2OJoviR ApRcygvOQTyPz4OvlbC4+C5SBTuXZvj9rztUmzAbVrV0jztGqirj4po6TTjVqoTkr6Ne 0hnbxXK0PCEIeFi+XLEWVKPo0iXxoh8TzmrE94r2yrrb5ySKN8uawiFvn2ixt86jZ/Nb MH4XPX+BZQz7Fi0lzGYIdyKjUZwE6b9iagEU/yU79su2eTpytw0oK8S4+/CmzJNrDjSl Rk8A== X-Gm-Message-State: AO0yUKXFSA/0+8dQSUlfW8CT2ISZrCirE+Ba5VXI6Agjdn/YgAN7aOnO TO3rCd4BzV1lNSJ9oBVdXBTP0N+eeSl5NEgmdbnuoc9aUUNXN2kQhR5e1Q== X-Google-Smtp-Source: AK7set80AhHbnamjsAT9UL5EiGK6t9fr+V5GoM1fQSsmaIWgiwoLktEsi1jOFU1w76ngDnRrhEvR736jLcWtTnruMk0= X-Received: by 2002:a05:622a:19a9:b0:3db:c138:ae87 with SMTP id u41-20020a05622a19a900b003dbc138ae87mr450471qtc.6.1679074866124; Fri, 17 Mar 2023 10:41:06 -0700 (PDT) MIME-Version: 1.0 References: <87mt4b73sv.fsf@linaro.org> In-Reply-To: From: Abhishek Singh Dagur Date: Fri, 17 Mar 2023 23:10:54 +0530 Message-ID: Subject: Re: Using QEMU how to redirect serial /dev/ttyS2 output of guest machine to host machine. To: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= Content-Type: multipart/alternative; boundary="000000000000f26e1a05f71c14d1" X-Mailman-Approved-At: Wed, 22 Mar 2023 11:17:46 +1100 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , openbmc@lists.ozlabs.org, =?UTF-8?B?QWxleCBCZW5uw6ll?= , qemu-devel@nongnu.org, Peter Maydell Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" --000000000000f26e1a05f71c14d1 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Thanks, I'll check it out. On Fri, Mar 17, 2023 at 10:54=E2=80=AFPM C=C3=A9dric Le Goater wrote: > On 3/17/23 17:06, Alex Benn=C3=A9e wrote: > > > > Abhishek Singh Dagur writes: > > > > (cc aspeed maintainers) > > > >> Hi all, > >> > >> We are using obmc-phosphor-image on an ast2500 board which is trying t= o > communicate with other devices > >> over serial port /dev/ttyS2. > >> As we are trying to emulate the machine on qemu we need to redirect th= e > request to the host machine so > >> that it can handle this request and return appropriately. > >> We tried using QEMU options like -serial ,-chardev but still not the > >> concrete way we get to do it. > > > > Yeah I'm afraid its non-obvious, certainly for built in serial ports. > > Try something like: > > > > ./qemu-system-aarch64 -M ast2500-evb \ > > -serial null -serial null -serial chardev:myserial \ > > -chardev file,id=3Dmyserial,path=3Doutput.txt \ > > $MORE_OPTIONS > > > > You have to add a -serial for each serial port up to the one you care > > about and then set the chardev for it. > > > > If you where adding a device to the system then you can explicitly set > > the target chardev for it with something like: > > > > -device isa-serial,iobase=3Dnnn,irq=3Dnnn,chardev=3DID > > > >> It will be very helpful if you can provide us some guidance on this. > > > > Another quirk for the aspeed boards seems to be the default uart can be > > an arbitrary one depending on the board model: > > > > 334: aspeed_soc_uart_set_chr(s, amc->uart_default, serial_hd(0)); > > 336: if (uart =3D=3D amc->uart_default) { > > 1112: amc->uart_default =3D ASPEED_DEV_UART5; > > 1407: amc->uart_default =3D ASPEED_DEV_UART1; > > > > as a result ASPEED_DEV_UART5 will always be the first serial port > > (serial_hd(0)). I don't know how Linux numbers them but worth being > > aware of. > > Yes. UART5 is the general default but it depends on the board definition > and the fuji was the first to require an exception. See commit 5d63d0c76c > ("hw/arm/aspeed: Allow machine to set UART default") > > Then, it became more complex with commit d2b3eaefb4 ("aspeed: Refactor > UART init for multi-SoC machines"). That's another topic. > > Abhishek, > > I am afraid, you will need to add a new board to fit what's in the DT. > > Or, here is a little patch adding a machine option to set the default uar= t. > It was never merged because it is a bit of hack, give it a try and we > will discuss. Use : > > -M ast2500-evb,uart-default=3Duart2 > > > Thanks, > > C. > > From 0d0700ae772fa5236914e96af1be5afcf0d4a994 Mon Sep 17 00:00:00 2001 > From: =3D?UTF-8?q?C=3DC3=3DA9dric=3D20Le=3D20Goater?=3D > Date: Fri, 17 Mar 2023 18:21:54 +0100 > Subject: [PATCH] aspeed: Add a "uart-default" machine option > MIME-Version: 1.0 > Content-Type: text/plain; charset=3DUTF-8 > Content-Transfer-Encoding: 8bit > > Signed-off-by: C=C3=A9dric Le Goater > --- > hw/arm/aspeed.c | 31 +++++++++++++++++++++++++++++-- > 1 file changed, 29 insertions(+), 2 deletions(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index 806bb10707..e0335cf167 100644 > --- a/hw/arm/aspeed.c > +++ b/hw/arm/aspeed.c > @@ -45,6 +45,7 @@ struct AspeedMachineState { > bool mmio_exec; > char *fmc_model; > char *spi_model; > + uint32_t uart_default; > uint32_t hw_strap1; > }; > > @@ -337,10 +338,11 @@ static void > connect_serial_hds_to_uarts(AspeedMachineState *bmc) > AspeedMachineClass *amc =3D ASPEED_MACHINE_GET_CLASS(bmc); > AspeedSoCState *s =3D &bmc->soc; > AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s); > + int uart_default =3D bmc->uart_default ? bmc->uart_default : > amc->uart_default; > > - aspeed_soc_uart_set_chr(s, amc->uart_default, serial_hd(0)); > + aspeed_soc_uart_set_chr(s, uart_default, serial_hd(0)); > for (int i =3D 1, uart =3D ASPEED_DEV_UART1; i < sc->uarts_num; i++= , > uart++) { > - if (uart =3D=3D amc->uart_default) { > + if (uart =3D=3D uart_default) { > continue; > } > aspeed_soc_uart_set_chr(s, uart, serial_hd(i)); > @@ -1145,6 +1147,25 @@ static void aspeed_set_spi_model(Object *obj, cons= t > char *value, Error **errp) > bmc->spi_model =3D g_strdup(value); > } > > +const QEnumLookup UartDefault_lookup =3D { > + .array =3D > + (const char *const[]) { > + [0] =3D "none", > + [1] =3D "uart1", > + [2] =3D "uart2", > + [3] =3D "uart3", > + [4] =3D "uart4", > + [5] =3D "uart5", > + }, > + .size =3D 6 > +}; > + > +static void aspeed_set_uart_default(Object *obj, int val, Error **err) > +{ > + AspeedMachineState *bmc =3D ASPEED_MACHINE(obj); > + bmc->uart_default =3D val + 1; > +} > + > static void aspeed_machine_class_props_init(ObjectClass *oc) > { > object_class_property_add_bool(oc, "execute-in-place", > @@ -1153,6 +1174,12 @@ static void > aspeed_machine_class_props_init(ObjectClass *oc) > object_class_property_set_description(oc, "execute-in-place", > "boot directly from CE0 flash device"); > > + object_class_property_add_enum(oc, "uart-default", "UartDefault", > + &UartDefault_lookup, NULL, > + aspeed_set_uart_default); > + object_class_property_set_description(oc, "uart-default", > + "Change the default UART of the board"); > + > object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model= , > aspeed_set_fmc_model); > object_class_property_set_description(oc, "fmc-model", > -- > 2.39.2 > > > --000000000000f26e1a05f71c14d1 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Thanks, I'll check it out.=C2=A0

On Fri, Mar 17, 20= 23 at 10:54=E2=80=AFPM C=C3=A9dric Le Goater <clg@kaod.org> wrote:
On 3/17/23 17:06, Alex Benn=C3=A9e wrote:
>
> Abhishek Singh Dagur <abhishek@drut.io> writes:
>
> (cc aspeed maintainers)
>
>> Hi all,
>>
>> We are using obmc-phosphor-image on an ast2500 board which is tryi= ng to communicate with other devices
>> over serial port /dev/ttyS2.
>> As we are trying to emulate the machine on qemu we need to redirec= t the request to the host machine so
>> that it can handle this request and return appropriately.
>> We tried using QEMU options like -serial ,-chardev but still not t= he
>> concrete way we get to do it.
>
> Yeah I'm afraid its non-obvious, certainly for built in serial por= ts.
> Try something like:
>
>=C2=A0 =C2=A0 ./qemu-system-aarch64 -M ast2500-evb \
>=C2=A0 =C2=A0 =C2=A0 -serial null -serial null -serial chardev:myserial= \
>=C2=A0 =C2=A0 =C2=A0 -chardev file,id=3Dmyserial,path=3Doutput.txt \ >=C2=A0 =C2=A0 =C2=A0 $MORE_OPTIONS
>
> You have to add a -serial for each serial port up to the one you care<= br> > about and then set the chardev for it.
>
> If you where adding a device to the system then you can explicitly set=
> the target chardev for it with something like:
>
>=C2=A0 =C2=A0 -device isa-serial,iobase=3Dnnn,irq=3Dnnn,chardev=3DID >
>> It will be very helpful if you can provide us some guidance on thi= s.
>
> Another quirk for the aspeed boards seems to be the default uart can b= e
> an arbitrary one depending on the board model:
>
> 334:=C2=A0 =C2=A0 aspeed_soc_uart_set_chr(s, amc->uart_default, ser= ial_hd(0));
> 336:=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (uart =3D=3D amc->uart_default) = {
> 1112:=C2=A0 =C2=A0 amc->uart_default =3D ASPEED_DEV_UART5;
> 1407:=C2=A0 =C2=A0 amc->uart_default =3D ASPEED_DEV_UART1;
>
> as a result ASPEED_DEV_UART5 will always be the first serial port
> (serial_hd(0)). I don't know how Linux numbers them but worth bein= g
> aware of.

Yes. UART5 is the general default but it depends on the board definition and the fuji was the first to require an exception. See commit 5d63d0c76c ("hw/arm/aspeed: Allow machine to set UART default")

Then, it became more complex with commit d2b3eaefb4 ("aspeed: Refactor=
UART init for multi-SoC machines"). That's another topic.

Abhishek,

I am afraid, you will need to add a new board to fit what's in the DT.<= br>
Or, here is a little patch adding a machine option to set the default uart.=
It was never merged because it is a bit of hack, give it a try and we
will discuss. Use :

=C2=A0 =C2=A0-M ast2500-evb,uart-default=3Duart2


Thanks,

C.

=C2=A0From 0d0700ae772fa5236914e96af1be5afcf0d4a994 Mon Sep 17 00:00:00 200= 1
From: =3D?UTF-8?q?C=3DC3=3DA9dric=3D20Le=3D20Goater?=3D <clg@kaod.org>
Date: Fri, 17 Mar 2023 18:21:54 +0100
Subject: [PATCH] aspeed: Add a "uart-default" machine option
MIME-Version: 1.0
Content-Type: text/plain; charset=3DUTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: C=C3=A9dric Le Goater <clg@kaod.org>
---
=C2=A0 hw/arm/aspeed.c | 31 +++++++++++++++++++++++++++++--
=C2=A0 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 806bb10707..e0335cf167 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -45,6 +45,7 @@ struct AspeedMachineState {
=C2=A0 =C2=A0 =C2=A0 bool mmio_exec;
=C2=A0 =C2=A0 =C2=A0 char *fmc_model;
=C2=A0 =C2=A0 =C2=A0 char *spi_model;
+=C2=A0 =C2=A0 uint32_t uart_default;
=C2=A0 =C2=A0 =C2=A0 uint32_t hw_strap1;
=C2=A0 };

@@ -337,10 +338,11 @@ static void connect_serial_hds_to_uarts(AspeedMachine= State *bmc)
=C2=A0 =C2=A0 =C2=A0 AspeedMachineClass *amc =3D ASPEED_MACHINE_GET_CLASS(b= mc);
=C2=A0 =C2=A0 =C2=A0 AspeedSoCState *s =3D &bmc->soc;
=C2=A0 =C2=A0 =C2=A0 AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s);
+=C2=A0 =C2=A0 int uart_default =3D bmc->uart_default ? bmc->uart_def= ault : amc->uart_default;

-=C2=A0 =C2=A0 aspeed_soc_uart_set_chr(s, amc->uart_default, serial_hd(0= ));
+=C2=A0 =C2=A0 aspeed_soc_uart_set_chr(s, uart_default, serial_hd(0));
=C2=A0 =C2=A0 =C2=A0 for (int i =3D 1, uart =3D ASPEED_DEV_UART1; i < sc= ->uarts_num; i++, uart++) {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (uart =3D=3D amc->uart_default) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (uart =3D=3D uart_default) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 continue;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 aspeed_soc_uart_set_chr(s, uart, serial_= hd(i));
@@ -1145,6 +1147,25 @@ static void aspeed_set_spi_model(Object *obj, const = char *value, Error **errp)
=C2=A0 =C2=A0 =C2=A0 bmc->spi_model =3D g_strdup(value);
=C2=A0 }

+const QEnumLookup UartDefault_lookup =3D {
+=C2=A0 =C2=A0 .array =3D
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 (const char *const[]) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 [0] =3D "none",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 [1] =3D "uart1",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 [2] =3D "uart2",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 [3] =3D "uart3",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 [4] =3D "uart4",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 [5] =3D "uart5",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 },
+=C2=A0 =C2=A0 .size =3D 6
+};
+
+static void aspeed_set_uart_default(Object *obj, int val, Error **err)
+{
+=C2=A0 =C2=A0 AspeedMachineState *bmc =3D ASPEED_MACHINE(obj);
+=C2=A0 =C2=A0 bmc->uart_default =3D val + 1;
+}
+
=C2=A0 static void aspeed_machine_class_props_init(ObjectClass *oc)
=C2=A0 {
=C2=A0 =C2=A0 =C2=A0 object_class_property_add_bool(oc, "execute-in-pl= ace",
@@ -1153,6 +1174,12 @@ static void aspeed_machine_class_props_init(ObjectCl= ass *oc)
=C2=A0 =C2=A0 =C2=A0 object_class_property_set_description(oc, "execut= e-in-place",
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"boot directly from CE0 flash device&qu= ot;);

+=C2=A0 =C2=A0 object_class_property_add_enum(oc, "uart-default",= "UartDefault",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0&UartDefault_lookup= , NULL,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0aspeed_set_uart_default= );
+=C2=A0 =C2=A0 object_class_property_set_description(oc, "uart-default= ",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0"Change the default UART of the board");<= br> +
=C2=A0 =C2=A0 =C2=A0 object_class_property_add_str(oc, "fmc-model"= ;, aspeed_get_fmc_model,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0aspeed_set_fmc_m= odel);
=C2=A0 =C2=A0 =C2=A0 object_class_property_set_description(oc, "fmc-mo= del",
--
2.39.2


--000000000000f26e1a05f71c14d1--