Regards,

Chris Chen

=B1H=A5=F3=AA=CC: openbmc &= lt;openbmc-bounces+chris.chen3=3Dflex.com@lists.ozlabs.org> =A5N=AA=ED B= ills, Jason M <jason.m.bills@linux.intel.com>
=B1H=A5=F3=A4=E9=B4=C1: 2021=A6~8=A4=EB18=A4=E9 =A4W=A4=C8 03:04
=A6=AC=A5=F3=AA=CC: openbmc@lists.ozlabs.org <openbmc@lists.ozlab= s.org>
=A5D=A6=AE: Re: [x86-power-control]: press the power button for a lo= ng time that can't force turn off system power

On 8/17/2021 5:30 AM, Andrew Jeffery wrote:
> Hi Chris,
>
> On Tue, 17 Aug 2021, at 20:47, Chris Chen (TPI) wrote:
>> Hi Andrew,
>>
>> That means I'm able to choose one of following 2 options to achiev= e
>> pass-through behavior when I using x86-power-control package, is m= y
>> understanding correct?
>>
>> 1. Add code to re-enable GPIOP0 and GPIOP1 into a pass-through fun= ction
>> after they are requested as a GPIO function in the x86-power-contr= ol
>> package. (Or maybe to create a script with "devmem > 0x1e6= e24BC 32
>> 0x0F000000" command that will be run automatically after syst= em up to
>> change register directly.)
>
> This is a hack and should be a last resort. Even then I'd avoid it.
>
> Certainly you should avoid shipping with /dev/mem enabled.
>
>>
>> 2. Modify pinctrl in Kernel that will not disable GPIOP0 and GPIOP= 1's
>> pass-through function if they already are configured as a pass-thr= ough
>> when they are requesting as a GPIO function.
>
> Perhaps, though maybe you should follow up on whether you can drive
> GPIOP1 when it's in pass-through mode. My recollection is you cannot,<= br> > at least for the AST2500 and earlier, in which case both P0 and P1 are=
> effectively inputs for the purpose of the GPIO controller despite P1 > being a physical output. This behaviour is probably more confusing tha= n
> it is helpful.
>
> There's also option 3 which is to emulate the pass-through in software= ,
> as I outlined in my previous email.
This is some of the configuration that I have on my system where the
pass-through is working correctly in x86-power-control:

I have one kernel patch that selects the "pass-through" pin
configuration on startup:
https://urldefense.com/v= 3/__https://github.com/Intel-BMC/linux/commit/8fe1ac31c13a0e8443c665394112b= a407c90ae70__;!!HSntlCg!Ep_IWFI6dHqTAFsDwLYoJ0JYl3PjsE2hcEJQFIkNt1nDgHL9PvJ= EAWMmDWtE4az1$ .

In x86-power-control, I have the POWER_BUTTON GPIO mapped to GPIOP2, and I'm able to claim and monitor that GPIO without affecting the
pass-through status.

I have POWER_OUT mapped to GPIOP3 which cannot be held in
x86-power-control as it disables the pass-through when claimed. So, i= t
is always released after the power-control action is completed.

Thanks,
-Jason

>
> Hope that helps,
>
> Andrew
>