openbmc.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
To: Andrew Jeffery <andrew@aj.id.au>,
	Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
	"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>,
	linux-mmc <linux-mmc@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Cc: BMC-SW <BMC-SW@aspeedtech.com>, Steven Lee <steven_lee@aspeedtech.com>
Subject: RE: [PATCH 02/10] sdhci: aspeed: Add SDR50 support
Date: Sat, 6 Nov 2021 10:01:23 +0000	[thread overview]
Message-ID: <HK0PR06MB27868D14ED8DF7550246674CB28F9@HK0PR06MB2786.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <125453f3-55d5-4b2a-afe8-6e76b268ce01@www.fastmail.com>

Hi Andrew,

Thanks for the review.

> -----Original Message-----
> From: Andrew Jeffery <andrew@aj.id.au>
> Sent: Tuesday, October 26, 2021 8:31 AM
> Subject: Re: [PATCH 02/10] sdhci: aspeed: Add SDR50 support
> 
> Hi Chin-Ting,
> 
> Sorry for the delay in looking at your series.
> 
> On Wed, 22 Sep 2021, at 20:01, Chin-Ting Kuo wrote:
> > From the analog waveform analysis result, SD/SDIO controller of
> > AST2600 cannot always work well with 200MHz. The upper bound stable
> > frequency for SD/SDIO controller is 100MHz. Thus, SDR50 supported bit,
> > instead of SDR104, in capability 2 register should be set in advance.
> >
> > Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
> > ---
> >  drivers/mmc/host/sdhci-of-aspeed.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-aspeed.c
> > b/drivers/mmc/host/sdhci-of-aspeed.c
> > index 6e4e132903a6..c6eaeb02e3f9 100644
> > --- a/drivers/mmc/host/sdhci-of-aspeed.c
> > +++ b/drivers/mmc/host/sdhci-of-aspeed.c
> > @@ -35,6 +35,8 @@
> >  #define ASPEED_SDC_CAP1_1_8V           (0 * 32 + 26)
> >  /* SDIO{14,24} */
> >  #define ASPEED_SDC_CAP2_SDR104         (1 * 32 + 1)
> > +/* SDIO{14,24} */
> 
> I don't think we need to duplicate this comment.

Okay, it will be modified in the next patch version.

> 
> > +#define ASPEED_SDC_CAP2_SDR50          (1 * 32 + 0)
> 
> Can we keep the defines in increasing bit order (i.e. put
> ASPEED_SDC_CAP2_SDR50 above ASPEED_SDC_CAP2_SDR104)?
> 

Okay.

> >
> >  struct aspeed_sdc {
> >  	struct clk *clk;
> > @@ -410,11 +412,17 @@ static int aspeed_sdhci_probe(struct
> > platform_device *pdev)
> >  	sdhci_get_of_property(pdev);
> >
> >  	if (of_property_read_bool(np, "mmc-hs200-1_8v") ||
> > +		of_property_read_bool(np, "sd-uhs-sdr50") ||
> 
> Minor formatting issue, but can you make sure all the conditions are aligned
> vertically from the left?
> 

It will also be updated in the next patch version.

> >  	    of_property_read_bool(np, "sd-uhs-sdr104")) {
> >  		aspeed_sdc_set_slot_capability(host, dev->parent,
> ASPEED_SDC_CAP1_1_8V,
> >  					       true, slot);
> >  	}
> >
> > +	if (of_property_read_bool(np, "sd-uhs-sdr50")) {
> > +		aspeed_sdc_set_slot_capability(host, dev->parent,
> ASPEED_SDC_CAP2_SDR50,
> > +					       true, slot);
> > +	}
> > +
> >  	if (of_property_read_bool(np, "sd-uhs-sdr104")) {
> >  		aspeed_sdc_set_slot_capability(host, dev->parent,
> ASPEED_SDC_CAP2_SDR104,
> >  					       true, slot);
> > --
> > 2.17.1

Chin-Ting

  reply	other threads:[~2021-11-06 10:02 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-22 10:31 [PATCH 00/10] ASPEED SD/eMMC controller clock configuration Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 01/10] clk: aspeed: ast2600: Porting sdhci clock source Chin-Ting Kuo
2021-09-23  0:02   ` Joel Stanley
2021-09-23  5:31     ` Chin-Ting Kuo
2021-10-26  6:10   ` Paul Menzel
2021-11-26  2:27     ` Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 02/10] sdhci: aspeed: Add SDR50 support Chin-Ting Kuo
2021-10-26  0:31   ` Andrew Jeffery
2021-11-06 10:01     ` Chin-Ting Kuo [this message]
2021-09-22 10:31 ` [PATCH 03/10] dts: aspeed: ast2600: Support SDR50 for SD device Chin-Ting Kuo
2021-10-26  0:42   ` Andrew Jeffery
2021-11-06 10:01     ` Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 04/10] mmc: Add invert flag for clock phase signedness Chin-Ting Kuo
2021-10-26  0:52   ` Andrew Jeffery
2021-11-06 10:02     ` Chin-Ting Kuo
2021-11-08  0:21       ` Andrew Jeffery
2021-09-22 10:31 ` [PATCH 05/10] mmc: aspeed: Adjust delay taps calculation method Chin-Ting Kuo
2021-10-26  3:10   ` Andrew Jeffery
2021-11-06 10:05     ` Chin-Ting Kuo
2021-11-07 23:42       ` Andrew Jeffery
2021-09-22 10:31 ` [PATCH 06/10] arm: dts: aspeed: Change eMMC device compatible Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 07/10] arm: dts: aspeed: Adjust clock phase parameter Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 08/10] arm: dts: ibm: " Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 09/10] dt-bindings: mmc: aspeed: Add max-tap-delay property Chin-Ting Kuo
2021-09-27 18:40   ` Rob Herring
2021-09-28  2:50     ` Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 10/10] dt-bindings: mmc: aspeed: Add a new compatible string Chin-Ting Kuo
2021-09-27 18:59   ` Rob Herring
2021-09-28  2:50     ` Chin-Ting Kuo
2021-09-28 22:28       ` Rob Herring
2021-09-29  3:03         ` Chin-Ting Kuo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=HK0PR06MB27868D14ED8DF7550246674CB28F9@HK0PR06MB2786.apcprd06.prod.outlook.com \
    --to=chin-ting_kuo@aspeedtech.com \
    --cc=BMC-SW@aspeedtech.com \
    --cc=adrian.hunter@intel.com \
    --cc=andrew@aj.id.au \
    --cc=devicetree@vger.kernel.org \
    --cc=joel@jms.id.au \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-aspeed@lists.ozlabs.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=openbmc@lists.ozlabs.org \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=steven_lee@aspeedtech.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).