>Priyatharshan,

>I'm still very confused by the word "AC" here. I k= now your server

>doesn't have a single joule of AC power on any voltage rail. = ;This

>server plugs into an OCP rack with a 12V DC bus-bar powering all t= he

>servers in the rack.

Sorry for confusing with the word "Ac" . It is actually 12V = On/Off.

>Vijay implemented, for Tiogapass, the 12V system power cycle. &nbs= p;This,

>in hardware, uses the HSC* to remove the server from the bus-bar, = which

>power cycles the entire server including the BMC. This is as= if someone

>physically pulled the server from the rack and then pushed it back= in

>but implemented via the HSC.

Agree, Vijay Implementation power cycles the entire server including t= he BMC.In Yv2(multi-host-system) for each slot 12V_STBY is connected via ho= t swap ADM1172.This ADM1172 power will be controlled by dedicated GPIO.So m= y functionality will implement power cycles only to the slot.This is as if someone physically pulled host from = the slot and then pushed it back.

>On the server you are working on, we should have that same design = for

>the "full system power cycle" which interacts with the H= SC. This should

>be done the same way as what Vijay implemented.

Agree.I also used Vijay's implementation and implemented "full sy= stem power cycle" for Yv2.

Gerrit Link : https://gerrit.openbmc-project.xyz/c/openbmc/meta-facebook/+/37065

>You also have power control to the multi-host cards which feed 12V= to

>each of the compute cards in your chassis. What I don't unde= rstand is

>why does this also need control of the full 12V and why is it sepa= rate

>from the normal "power on the compute card" sequence? &n= bsp;This "power on

>the compute card" sequence is what is suppose to be modelled = by the

>'chassisN' objects referenced by others.

>Can you expand on what the difference is and what functionality yo= u are

>enabling by having two different slot-level power controls?

The earlier "power on/off/cycle the computer card" sequence = will only handle the computer card portion of the host.

But the new feature [Slot on/off/cycle] will power cycles the entire card [= BIC + computer card portion + rest of the hardware in twin lake] for each = slot.

Thanks,

Priyatharshan P

From: Patrick Williams
Sent: Thursday, October 08, 2020 22:01
To: P. Priyatharshan
Cc: Vijay Khemka; openbmc@lists.ozlabs.org; ed@tanous.net; Velumani = T-ERS,HCLTech
Subject: Re: 12v slot AC Support in x86-power-control

On Thu, Oct 08, 2020 at 01:13:49PM +0000, P. Priya= tharshan wrote:
> Out platform is multi host system and we have the host as FRU an= d it can be plugged in to a slot. The slot has an option to control slot po= wer and this can be used for a AC cycle.

Priyatharshan,

I'm still very confused by the word "AC" here. I know your = server
doesn't have a single joule of AC power on any voltage rail. This
server plugs into an OCP rack with a 12V DC bus-bar powering all the
servers in the rack.

Vijay implemented, for Tiogapass, the 12V system power cycle. This, in hardware, uses the HSC* to remove the server from the bus-bar, which
power cycles the entire server including the BMC. This is as if someo= ne
physically pulled the server from the rack and then pushed it back in
but implemented via the HSC.

On the server you are working on, we should have that same design for
the "full system power cycle" which interacts with the HSC. = This should
be done the same way as what Vijay implemented.

You also have power control to the multi-host cards which feed 12V to
each of the compute cards in your chassis. What I don't understand is=
why does this also need control of the full 12V and why is it separate
from the normal "power on the compute card" sequence? This = "power on
the compute card" sequence is what is suppose to be modelled by the 'chassisN' objects referenced by others.

Can you expand on what the difference is and what functionality you are
enabling by having two different slot-level power controls?

> We proposed a design to add the slot power control in the x86-po= wer-control.The earlier discussion can be found in the below link.
>
> https://lists.ozlabs.org/pipermail/openbmc/2020-August/022481.html

* - HSC =3D Hot Swap Controller.

--
Patrick Williams