[v1] arm64: dts: qcom: sdm845: Fix pcs_misc region address for UNI PHY
diff mbox series

Message ID 20181025172318.31353-1-mgautam@codeaurora.org
State Accepted
Commit 539e7a6849ae6a96f758889df8922b47b649f37c
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Series
  • [v1] arm64: dts: qcom: sdm845: Fix pcs_misc region address for UNI PHY
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Commit Message

Manu Gautam Oct. 25, 2018, 5:23 p.m. UTC
Correct address for pcs_misc register region of USB3 QMP UNI PHY.
These registers are used during runtime-suspend/resume routines
of phy.

Fixes: ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Doug Anderson Oct. 25, 2018, 8:38 p.m. UTC | #1
Hi,
On Thu, Oct 25, 2018 at 10:23 AM Manu Gautam <mgautam@codeaurora.org> wrote:
>
> Correct address for pcs_misc register region of USB3 QMP UNI PHY.
> These registers are used during runtime-suspend/resume routines
> of phy.
>
> Fixes: ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
> Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index b72bdb0a31a5..84bee81562a5 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -1156,7 +1156,7 @@
>                                 reg = <0x88eb200 0x128>,
>                                       <0x88eb400 0x1fc>,
>                                       <0x88eb800 0x218>,
> -                                     <0x88e9600 0x70>;
> +                                     <0x88eb600 0x70>;

Whoops, sorry for not noticing this earlier.  Thanks for the fix!

Evan's most recent patch to the bindings [1] should also be fixed
eventually too.  It feels like those patches have gone through enough
spins though, so maybe we can just post this fix atop those?

Reviewed-by: Douglas Anderson <dianders@chromium.org>

[1] https://lkml.kernel.org/r/20181024172735.154304-2-evgreen@chromium.org
Evan Green Oct. 26, 2018, 5:25 p.m. UTC | #2
On Thu, Oct 25, 2018 at 1:38 PM Doug Anderson <dianders@chromium.org> wrote:
>
> Hi,
> On Thu, Oct 25, 2018 at 10:23 AM Manu Gautam <mgautam@codeaurora.org> wrote:
> >
> > Correct address for pcs_misc register region of USB3 QMP UNI PHY.
> > These registers are used during runtime-suspend/resume routines
> > of phy.
> >
> > Fixes: ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
> > Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index b72bdb0a31a5..84bee81562a5 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -1156,7 +1156,7 @@
> >                                 reg = <0x88eb200 0x128>,
> >                                       <0x88eb400 0x1fc>,
> >                                       <0x88eb800 0x218>,
> > -                                     <0x88e9600 0x70>;
> > +                                     <0x88eb600 0x70>;
>
> Whoops, sorry for not noticing this earlier.  Thanks for the fix!
>
> Evan's most recent patch to the bindings [1] should also be fixed
> eventually too.  It feels like those patches have gone through enough
> spins though, so maybe we can just post this fix atop those?
>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
>
> [1] https://lkml.kernel.org/r/20181024172735.154304-2-evgreen@chromium.org

I'll spin mine. Incoming!

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index b72bdb0a31a5..84bee81562a5 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1156,7 +1156,7 @@ 
 				reg = <0x88eb200 0x128>,
 				      <0x88eb400 0x1fc>,
 				      <0x88eb800 0x218>,
-				      <0x88e9600 0x70>;
+				      <0x88eb600 0x70>;
 				#phy-cells = <0>;
 				clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
 				clock-names = "pipe0";