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From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>, Icenowy Zheng <icenowy@aosc.io>,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	Vasily Khoruzhick <anarsoul@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	David Airlie <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org,
	Michael Trimarchi <michael@amarulasolutions.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Cc: Jagan Teki <jagan@amarulasolutions.com>
Subject: [PATCH v3 04/25] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support
Date: Fri, 26 Oct 2018 20:13:23 +0530	[thread overview]
Message-ID: <20181026144344.27778-5-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20181026144344.27778-1-jagan@amarulasolutions.com>

The MIPI DSI controller on Allwinner A64 is similar to
Allwinner A31 without support of DSI mod clock(CLK_DSI_SCLK)

So, alter has_mod_clk bool via driver data for respective
SoC's compatible.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v3:
- add tested credit
Changes for v2:
- none

 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 47 ++++++++++++++++++++------
 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h |  5 +++
 2 files changed, 41 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index e3b34a345546..8e9c76febca2 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -10,6 +10,7 @@
 #include <linux/component.h>
 #include <linux/crc-ccitt.h>
 #include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/reset.h>
@@ -981,6 +982,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
 	dsi->host.ops = &sun6i_dsi_host_ops;
 	dsi->host.dev = dev;
 
+	dsi->variant = of_device_get_match_data(dev);
+
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(dev, res);
 	if (IS_ERR(base)) {
@@ -1001,17 +1004,20 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
 		return PTR_ERR(dsi->reset);
 	}
 
-	dsi->mod_clk = devm_clk_get(dev, "mod");
-	if (IS_ERR(dsi->mod_clk)) {
-		dev_err(dev, "Couldn't get the DSI mod clock\n");
-		return PTR_ERR(dsi->mod_clk);
+	if (dsi->variant->has_mod_clk) {
+		dsi->mod_clk = devm_clk_get(dev, "mod");
+		if (IS_ERR(dsi->mod_clk)) {
+			dev_err(dev, "Couldn't get the DSI mod clock\n");
+			return PTR_ERR(dsi->mod_clk);
+		}
 	}
 
 	/*
 	 * In order to operate properly, that clock seems to be always
 	 * set to 297MHz.
 	 */
-	clk_set_rate_exclusive(dsi->mod_clk, 297000000);
+	if (dsi->variant->has_mod_clk)
+		clk_set_rate_exclusive(dsi->mod_clk, 297000000);
 
 	dphy_node = of_parse_phandle(dev->of_node, "phys", 0);
 	ret = sun6i_dphy_probe(dsi, dphy_node);
@@ -1043,7 +1049,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
 	pm_runtime_disable(dev);
 	sun6i_dphy_remove(dsi);
 err_unprotect_clk:
-	clk_rate_exclusive_put(dsi->mod_clk);
+	if (dsi->variant->has_mod_clk)
+		clk_rate_exclusive_put(dsi->mod_clk);
 	return ret;
 }
 
@@ -1056,7 +1063,8 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
 	mipi_dsi_host_unregister(&dsi->host);
 	pm_runtime_disable(dev);
 	sun6i_dphy_remove(dsi);
-	clk_rate_exclusive_put(dsi->mod_clk);
+	if (dsi->variant->has_mod_clk)
+		clk_rate_exclusive_put(dsi->mod_clk);
 
 	return 0;
 }
@@ -1066,7 +1074,8 @@ static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev)
 	struct sun6i_dsi *dsi = dev_get_drvdata(dev);
 
 	reset_control_deassert(dsi->reset);
-	clk_prepare_enable(dsi->mod_clk);
+	if (dsi->variant->has_mod_clk)
+		clk_prepare_enable(dsi->mod_clk);
 
 	/*
 	 * Enable the DSI block.
@@ -1094,7 +1103,8 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev)
 {
 	struct sun6i_dsi *dsi = dev_get_drvdata(dev);
 
-	clk_disable_unprepare(dsi->mod_clk);
+	if (dsi->variant->has_mod_clk)
+		clk_disable_unprepare(dsi->mod_clk);
 	reset_control_assert(dsi->reset);
 
 	return 0;
@@ -1106,9 +1116,24 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = {
 			   NULL)
 };
 
+static const struct sun6i_dsi_variant sun6i_a31_dsi = {
+	.has_mod_clk = true,
+};
+
+static const struct sun6i_dsi_variant sun50i_a64_dsi = {
+	.has_mod_clk = false,
+};
+
 static const struct of_device_id sun6i_dsi_of_table[] = {
-	{ .compatible = "allwinner,sun6i-a31-mipi-dsi" },
-	{ }
+	{
+		.compatible = "allwinner,sun6i-a31-mipi-dsi",
+		.data = &sun6i_a31_dsi,
+	},
+	{
+		.compatible = "allwinner,sun50i-a64-mipi-dsi",
+		.data = &sun50i_a64_dsi,
+	},
+	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);
 
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
index dbbc5b3ecbda..597b62227019 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
@@ -20,6 +20,10 @@ struct sun6i_dphy {
 	struct reset_control	*reset;
 };
 
+struct sun6i_dsi_variant {
+	bool			has_mod_clk;
+};
+
 struct sun6i_dsi {
 	struct drm_connector	connector;
 	struct drm_encoder	encoder;
@@ -35,6 +39,7 @@ struct sun6i_dsi {
 	struct sun4i_drv	*drv;
 	struct mipi_dsi_device	*device;
 	struct drm_panel	*panel;
+	const struct sun6i_dsi_variant	*variant;
 };
 
 static inline struct sun6i_dsi *host_to_sun6i_dsi(struct mipi_dsi_host *host)
-- 
2.18.0.321.gffc6fa0e3


  parent reply	other threads:[~2018-10-26 14:44 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-26 14:43 [PATCH v3 00/25] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2018-10-26 14:43 ` [PATCH v3 01/25] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY Jagan Teki
2018-10-26 14:43 ` [PATCH v3 02/25] clk: sunxi-ng: Add check for minimal rate to NKM PLLs Jagan Teki
2018-10-26 14:43 ` [PATCH v3 03/25] clk: sunxi-ng: Add check for maximum " Jagan Teki
2018-10-26 14:43 ` Jagan Teki [this message]
2018-10-26 14:43 ` [PATCH v3 05/25] dt-bindings: sun6i-dsi: Add compatible for A64 MIPI DSI Jagan Teki
2018-10-26 14:43 ` [PATCH v3 06/25] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2018-10-29  9:17   ` Maxime Ripard
2018-10-26 14:43 ` [PATCH v3 07/25] drm/sun4i: sun6i_mipi_dsi: Fix VBP size calculation Jagan Teki
2018-10-26 14:43 ` [PATCH v3 08/25] drm/sun4i: sun6i_mipi_dsi: Fix TCON DRQ set bits Jagan Teki
2018-10-26 14:43 ` [PATCH v3 09/25] drm/sun4i: sun6i_mipi_dsi: Refactor vertical video start delay Jagan Teki
2018-10-26 14:43 ` [PATCH v3 10/25] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value Jagan Teki
2018-10-26 14:43 ` [PATCH v3 11/25] drm/sun4i: sun6i_mipi_dsi: Fix DSI hblk timing calculation Jagan Teki
2018-10-26 14:43 ` [PATCH v3 12/25] drm/sun4i: sun6i_mipi_dsi: Add DSI hblk packet overhead Jagan Teki
2018-10-29  9:22   ` Maxime Ripard
2018-10-29 14:26     ` Jagan Teki
2018-11-05  8:31       ` Maxime Ripard
2018-10-26 14:43 ` [PATCH v3 13/25] drm/sun4i: sun6i_mipi_dsi: Fix DSI hfp timing value Jagan Teki
2018-10-26 14:43 ` [PATCH v3 14/25] drm/sun4i: sun6i_mipi_dsi: Increase hfp packet overhead Jagan Teki
2018-10-29  9:27   ` Maxime Ripard
2018-10-29 14:27     ` Jagan Teki
2018-11-05  8:33       ` Maxime Ripard
2018-10-26 14:43 ` [PATCH v3 15/25] drm/sun4i: sun6i_mipi_dsi: Set proper vblk timing calculation Jagan Teki
2018-10-29  9:30   ` Maxime Ripard
2018-10-26 14:43 ` [PATCH v3 16/25] drm/sun4i: sun6i_mipi_dsi: Add support for VCC-DSI voltage regulator Jagan Teki
2018-10-29  9:31   ` Maxime Ripard
2018-10-29 14:48     ` Jagan Teki
2018-11-05  8:34       ` Maxime Ripard
2018-10-26 14:43 ` [PATCH v3 17/25] dt-bindings: panel: Add Bananapi S070WV20-CT16 ICN6211 MIPI-DSI to RGB bridge Jagan Teki
2018-10-30 20:23   ` Rob Herring
2018-10-31  8:53   ` Andrzej Hajda
2018-10-31  8:58     ` Chen-Yu Tsai
2018-10-31  9:15       ` Andrzej Hajda
2018-11-06 18:08         ` Jagan Teki
2018-11-07  9:11           ` Andrzej Hajda
2018-11-10  7:32             ` Jagan Teki
2018-11-13  7:56               ` Andrzej Hajda
2018-11-18 18:20                 ` Jagan Teki
2018-11-19  9:49                   ` Andrzej Hajda
2018-10-31  9:15       ` [linux-sunxi] " Julian Calaby
2018-11-06 18:13         ` Jagan Teki
2018-11-07 10:20           ` Julian Calaby
2018-10-26 14:43 ` [PATCH v3 18/25] drm/panel: " Jagan Teki
2018-10-29  9:33   ` Maxime Ripard
2018-10-26 14:43 ` [PATCH v3 19/25] dt-bindings: panel: Add Techstar TS8550B MIPI DSI panel Jagan Teki
2018-10-30 20:27   ` Rob Herring
2018-10-26 14:43 ` [PATCH v3 20/25] drm/panel: Add Techstar TS8550B MIPI-DSI LCD panel Jagan Teki
2018-10-26 16:13   ` [linux-sunxi] " Priit Laes
2018-10-27  9:55     ` Jagan Teki
2018-10-27 16:27       ` Priit Laes
2018-10-26 14:43 ` [PATCH v3 21/25] clk: sunxi-ng: a64: Add min and max rate for PLL_MIPI Jagan Teki
2018-10-26 14:43 ` [PATCH v3 22/25] dt-bindings: sun6i-dsi: Add compatible for A64 DPHY Jagan Teki
2018-10-30 20:28   ` Rob Herring
2018-10-31  2:24   ` Chen-Yu Tsai
2018-10-26 14:43 ` [PATCH v3 23/25] arm64: dts: allwinner: a64: Add DSI pipeline Jagan Teki
2018-10-26 14:43 ` [PATCH v3 24/25] [DO NOT MERGE] arm64: dts: allwinner: bananapi-m64: Bananapi S070WV20-CT16 DSI panel Jagan Teki
2018-10-26 14:43 ` [PATCH v3 25/25] arm64: dts: allwinner: a64-amarula-relic: Enable Techstar TS8550B MIPI-DSI panel Jagan Teki
2018-10-29  9:15 ` [PATCH v3 00/25] drm/sun4i: Allwinner A64 MIPI-DSI support Maxime Ripard
2018-10-29 12:34   ` Jagan Teki

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