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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, vladimir.murzin@arm.com,
	will.deacon@arm.com, catalin.marinas@arm.com,
	mark.rutland@arm.com, Suzuki K Poulose <suzuki.poulose@arm.com>,
	Andre Przywara <andre.przywara@arm.com>
Subject: [PATCH 1/7] arm64: capabilities: Merge entries for ARM64_WORKAROUND_CLEAN_CACHE
Date: Mon,  5 Nov 2018 11:55:11 +0000	[thread overview]
Message-ID: <1541418917-14219-2-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1541418917-14219-1-git-send-email-suzuki.poulose@arm.com>

We have two entries for ARM64_WORKAROUND_CLEAN_CACHE capability :

1) ARM Errata 826319, 827319, 824069, 819472 on A53 r0p[012]
2) ARM Errata 819472 on A53 r0p[01]

Both have the same work around. Merge these entries to avoid
duplicate entries for a single capability.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/kernel/cpu_errata.c | 19 +++++++------------
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index a509e351..c825bc0 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -573,24 +573,19 @@ static const struct midr_range arm64_harden_el2_vectors[] = {
 const struct arm64_cpu_capabilities arm64_errata[] = {
 #if	defined(CONFIG_ARM64_ERRATUM_826319) || \
 	defined(CONFIG_ARM64_ERRATUM_827319) || \
-	defined(CONFIG_ARM64_ERRATUM_824069)
+	defined(CONFIG_ARM64_ERRATUM_824069) || \
+	defined(CONFIG_ARM64_ERRATUM_819472)
 	{
-	/* Cortex-A53 r0p[012] */
-		.desc = "ARM errata 826319, 827319, 824069",
+	/*
+	 * Cortex-A53 r0p[012]: ARM errata 826319, 827319, 824069
+	 * Cortex-A53 r0p[01] : ARM errata 819472
+	 */
+		.desc = "ARM errata 826319, 827319, 824069, 819472",
 		.capability = ARM64_WORKAROUND_CLEAN_CACHE,
 		ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 2),
 		.cpu_enable = cpu_enable_cache_maint_trap,
 	},
 #endif
-#ifdef CONFIG_ARM64_ERRATUM_819472
-	{
-	/* Cortex-A53 r0p[01] */
-		.desc = "ARM errata 819472",
-		.capability = ARM64_WORKAROUND_CLEAN_CACHE,
-		ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 1),
-		.cpu_enable = cpu_enable_cache_maint_trap,
-	},
-#endif
 #ifdef CONFIG_ARM64_ERRATUM_832075
 	{
 	/* Cortex-A57 r0p0 - r1p2 */
-- 
2.7.4


  reply	other threads:[~2018-11-05 11:55 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-05 11:55 [PATCH 0/7] arm64: capabilities: Optimize checking and enabling Suzuki K Poulose
2018-11-05 11:55 ` Suzuki K Poulose [this message]
2018-11-26 14:06   ` [PATCH 1/7] arm64: capabilities: Merge entries for ARM64_WORKAROUND_CLEAN_CACHE Will Deacon
2018-11-26 15:09     ` Suzuki K Poulose
2018-11-27 19:31       ` Will Deacon
2018-11-05 11:55 ` [PATCH 2/7] arm64: capabilities: Merge duplicate Cavium erratum entries Suzuki K Poulose
2018-11-05 11:55 ` [PATCH 3/7] arm64: capabilities: Merge duplicate entries for Qualcomm erratum 1003 Suzuki K Poulose
2018-11-05 11:55 ` [PATCH 4/7] arm64: capabilities: Speed up capability lookup Suzuki K Poulose
2018-11-05 11:55 ` [PATCH 5/7] arm64: capabilities: Optimize this_cpu_has_cap Suzuki K Poulose
2018-11-05 11:55 ` [PATCH 6/7] arm64: capabilities: Use linear array for detection and verification Suzuki K Poulose
2018-11-05 11:55 ` [PATCH 7/7] arm64: capabilities: Batch cpu_enable callbacks Suzuki K Poulose
2018-11-05 12:14 ` [PATCH 0/7] arm64: capabilities: Optimize checking and enabling Vladimir Murzin

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