From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: linux@armlinux.org.uk, bp@alien8.de, arnd@arndb.de,
jlu@pengutronix.de, gregory.clement@bootlin.com
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Chris Packham <chris.packham@alliedtelesis.co.nz>
Subject: [PATCH v6 3/9] ARM: aurora-l2: add defines for parity and ECC registers
Date: Fri, 9 Nov 2018 20:03:43 +1300 [thread overview]
Message-ID: <20181109070349.20464-4-chris.packham@alliedtelesis.co.nz> (raw)
In-Reply-To: <20181109070349.20464-1-chris.packham@alliedtelesis.co.nz>
From: Jan Luebbe <jlu@pengutronix.de>
These defines will be used by subsequent patches to add support for the
parity check and error correction functionality in the Aurora L2 cache
controller.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
.../include/asm/hardware/cache-aurora-l2.h | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/include/asm/hardware/cache-aurora-l2.h b/arch/arm/include/asm/hardware/cache-aurora-l2.h
index dc5c479ec4c3..39769ffa0051 100644
--- a/arch/arm/include/asm/hardware/cache-aurora-l2.h
+++ b/arch/arm/include/asm/hardware/cache-aurora-l2.h
@@ -31,6 +31,9 @@
#define AURORA_ACR_REPLACEMENT_TYPE_SEMIPLRU \
(3 << AURORA_ACR_REPLACEMENT_OFFSET)
+#define AURORA_ACR_PARITY_EN (1 << 21)
+#define AURORA_ACR_ECC_EN (1 << 20)
+
#define AURORA_ACR_FORCE_WRITE_POLICY_OFFSET 0
#define AURORA_ACR_FORCE_WRITE_POLICY_MASK \
(0x3 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET)
@@ -41,6 +44,51 @@
#define AURORA_ACR_FORCE_WRITE_THRO_POLICY \
(2 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET)
+#define AURORA_ERR_CNT_REG 0x600
+#define AURORA_ERR_ATTR_CAP_REG 0x608
+#define AURORA_ERR_ADDR_CAP_REG 0x60c
+#define AURORA_ERR_WAY_CAP_REG 0x610
+#define AURORA_ERR_INJECT_CTL_REG 0x614
+#define AURORA_ERR_INJECT_MASK_REG 0x618
+
+#define AURORA_ERR_CNT_CLR_OFFSET 31
+#define AURORA_ERR_CNT_CLR \
+ (0x1 << AURORA_ERR_CNT_CLR_OFFSET)
+#define AURORA_ERR_CNT_UE_OFFSET 16
+#define AURORA_ERR_CNT_UE_MASK \
+ (0x7fff << AURORA_ERR_CNT_UE_OFFSET)
+#define AURORA_ERR_CNT_CE_OFFSET 0
+#define AURORA_ERR_CNT_CE_MASK \
+ (0xffff << AURORA_ERR_CNT_CE_OFFSET)
+
+#define AURORA_ERR_ATTR_SRC_OFF 16
+#define AURORA_ERR_ATTR_SRC_MSK \
+ (0x7 << AURORA_ERR_ATTR_SRC_OFF)
+#define AURORA_ERR_ATTR_TXN_OFF 12
+#define AURORA_ERR_ATTR_TXN_MSK \
+ (0xf << AURORA_ERR_ATTR_TXN_OFF)
+#define AURORA_ERR_ATTR_ERR_OFF 8
+#define AURORA_ERR_ATTR_ERR_MSK \
+ (0x3 << AURORA_ERR_ATTR_ERR_OFF)
+#define AURORA_ERR_ATTR_CAP_VALID_OFF 0
+#define AURORA_ERR_ATTR_CAP_VALID \
+ (0x1 << AURORA_ERR_ATTR_CAP_VALID_OFF)
+
+#define AURORA_ERR_ADDR_CAP_ADDR_MASK 0xffffffe0
+
+#define AURORA_ERR_WAY_IDX_OFF 8
+#define AURORA_ERR_WAY_IDX_MSK \
+ (0xfff << AURORA_ERR_WAY_IDX_OFF)
+#define AURORA_ERR_WAY_CAP_WAY_OFFSET 1
+#define AURORA_ERR_WAY_CAP_WAY_MASK \
+ (0xf << AURORA_ERR_WAY_CAP_WAY_OFFSET)
+
+#define AURORA_ERR_INJECT_CTL_ADDR_MASK 0xfffffff0
+#define AURORA_ERR_ATTR_TXN_OFF 12
+#define AURORA_ERR_INJECT_CTL_EN_MASK 0x3
+#define AURORA_ERR_INJECT_CTL_EN_PARITY 0x2
+#define AURORA_ERR_INJECT_CTL_EN_ECC 0x1
+
#define AURORA_MAX_RANGE_SIZE 1024
#define AURORA_WAY_SIZE_SHIFT 2
--
2.19.1
next prev parent reply other threads:[~2018-11-09 7:04 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-09 7:03 [PATCH v6 0/9] EDAC drivers for Armada XP L2 and DDR Chris Packham
2018-11-09 7:03 ` [PATCH v6 1/9] ARM: l2c: move cache-aurora-l2.h to asm/hardware Chris Packham
2018-11-09 7:03 ` [PATCH v6 2/9] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Chris Packham
2018-11-09 7:03 ` Chris Packham [this message]
2018-11-09 7:03 ` [PATCH v6 4/9] ARM: l2x0: support parity-enable/disable on aurora Chris Packham
2018-11-09 7:03 ` [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding Chris Packham
2018-11-09 11:40 ` Arnd Bergmann
2018-11-09 11:48 ` Russell King - ARM Linux
2018-11-09 15:58 ` Arnd Bergmann
2018-11-11 19:57 ` Chris Packham
2018-11-11 22:35 ` Rob Herring
2018-11-09 7:03 ` [PATCH v6 6/9] ARM: l2x0: add marvell,ecc-enable property for aurora Chris Packham
2018-11-09 7:03 ` [PATCH v6 7/9] EDAC: Add missing debugfs_create_x32 wrapper Chris Packham
2018-11-09 7:03 ` [PATCH v6 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC Chris Packham
2018-11-11 19:40 ` Borislav Petkov
2018-11-09 7:03 ` [PATCH v6 9/9] EDAC: armada_xp: Add support for more SoCs Chris Packham
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