From: Mathias Kresin <dev@kresin.me>
To: John Crispin <john@phrozen.org>,
Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
James Hogan <jhogan@kernel.org>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: [PATCH] MIPS: ralink: Fix mt7620 nd_sd pinmux
Date: Mon, 26 Nov 2018 11:25:40 +0100 [thread overview]
Message-ID: <20181126102540.5304-1-dev@kresin.me> (raw)
In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are
configured as GPIOs. If they are blocked by the sd function, they can't
be used as GPIOs.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Reported-by: Kristian Evensen <kristian.evensen@gmail.com>
Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux
data")
Cc: stable@vger.kernel.org # v3.18+
---
arch/mips/ralink/mt7620.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 41b71c4352c2..c1ce6f43642b 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -84,7 +84,7 @@ static struct rt2880_pmx_func pcie_rst_grp[] = {
};
static struct rt2880_pmx_func nd_sd_grp[] = {
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
- FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
+ FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
};
static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
--
2.17.1
next reply other threads:[~2018-11-26 10:25 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-26 10:25 Mathias Kresin [this message]
2018-11-26 18:22 ` [PATCH] MIPS: ralink: Fix mt7620 nd_sd pinmux Paul Burton
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