From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v7 06/16] powerpc/mm: Move pgtable_t into platform headers
Date: Wed, 28 Nov 2018 11:46:33 +0000 (UTC) [thread overview]
Message-ID: <ea410c874c321aef87813356ba2fa2fa79c242df.1543405086.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1543405086.git.christophe.leroy@c-s.fr>
This patch move pgtable_t into platform headers.
It gets rid of the CONFIG_PPC_64K_PAGES case for PPC64
as nohash/64 doesn't support CONFIG_PPC_64K_PAGES.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/mmu-hash.h | 2 ++
arch/powerpc/include/asm/book3s/64/mmu.h | 9 +++++++++
arch/powerpc/include/asm/nohash/32/mmu.h | 4 ++++
arch/powerpc/include/asm/nohash/64/mmu.h | 4 ++++
arch/powerpc/include/asm/page.h | 14 --------------
5 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/32/mmu-hash.h b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
index e38c91388c40..5bd26c218b94 100644
--- a/arch/powerpc/include/asm/book3s/32/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
@@ -42,6 +42,8 @@ struct ppc_bat {
u32 batu;
u32 batl;
};
+
+typedef struct page *pgtable_t;
#endif /* !__ASSEMBLY__ */
/*
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
index 6328857f259f..1ceee000c18d 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -2,6 +2,8 @@
#ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_
#define _ASM_POWERPC_BOOK3S_64_MMU_H_
+#include <asm/page.h>
+
#ifndef __ASSEMBLY__
/*
* Page size definition
@@ -24,6 +26,13 @@ struct mmu_psize_def {
};
extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
+/*
+ * For BOOK3s 64 with 4k and 64K linux page size
+ * we want to use pointers, because the page table
+ * actually store pfn
+ */
+typedef pte_t *pgtable_t;
+
#endif /* __ASSEMBLY__ */
/* 64-bit classic hash table MMU */
diff --git a/arch/powerpc/include/asm/nohash/32/mmu.h b/arch/powerpc/include/asm/nohash/32/mmu.h
index af0e8b54876a..f61f933a4cd8 100644
--- a/arch/powerpc/include/asm/nohash/32/mmu.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu.h
@@ -16,4 +16,8 @@
#include <asm/nohash/32/mmu-8xx.h>
#endif
+#ifndef __ASSEMBLY__
+typedef struct page *pgtable_t;
+#endif
+
#endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/64/mmu.h b/arch/powerpc/include/asm/nohash/64/mmu.h
index 87871d027b75..e6585480dfc4 100644
--- a/arch/powerpc/include/asm/nohash/64/mmu.h
+++ b/arch/powerpc/include/asm/nohash/64/mmu.h
@@ -5,4 +5,8 @@
/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
#include <asm/nohash/mmu-book3e.h>
+#ifndef __ASSEMBLY__
+typedef struct page *pgtable_t;
+#endif
+
#endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 9ea903221a9f..a7624a3b1435 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -335,20 +335,6 @@ void arch_free_page(struct page *page, int order);
#endif
struct vm_area_struct;
-#ifdef CONFIG_PPC_BOOK3S_64
-/*
- * For BOOK3s 64 with 4k and 64K linux page size
- * we want to use pointers, because the page table
- * actually store pfn
- */
-typedef pte_t *pgtable_t;
-#else
-#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC64)
-typedef pte_t *pgtable_t;
-#else
-typedef struct page *pgtable_t;
-#endif
-#endif
#include <asm-generic/memory_model.h>
#endif /* __ASSEMBLY__ */
--
2.13.3
next prev parent reply other threads:[~2018-11-28 11:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-28 11:46 [PATCH v7 00/16] Implement use of HW assistance on TLB table walk on 8xx Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 01/16] powerpc/book3s32: Remove CONFIG_BOOKE dependent code Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 02/16] powerpc/8xx: Remove PTE_ATOMIC_UPDATES Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 03/16] powerpc/mm: Move pte_fragment_alloc() to a common location Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 04/16] powerpc/mm: Avoid useless lock with single page fragments Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 05/16] powerpc/mm: move platform specific mmu-xxx.h in platform directories Christophe Leroy
2018-11-28 11:46 ` Christophe Leroy [this message]
2018-11-28 11:46 ` [PATCH v7 07/16] powerpc/mm: add helpers to get/set mm.context->pte_frag Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 08/16] powerpc/mm: Extend pte_fragment functionality to PPC32 Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 09/16] powerpc/8xx: Move SW perf counters in first 32kb of memory Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 10/16] powerpc/8xx: Temporarily disable 16k pages and hugepages Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 11/16] powerpc/mm: Use hardware assistance in TLB handlers on the 8xx Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 12/16] powerpc/mm: Enable 8M hugepage support with HW assistance " Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 13/16] powerpc/mm: Enable 512k " Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 14/16] powerpc/mm: reintroduce 16K pages with HW assistance on 8xx Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 15/16] powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 in TLB Miss handlers Christophe Leroy
2018-11-28 11:46 ` [PATCH v7 16/16] powerpc/8xx: regroup TLB handler routines Christophe Leroy
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