From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
j.neuschaefer@gmx.net
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v1 07/13] powerpc/mm/32s: add setibat() clearibat() and update_bats()
Date: Thu, 29 Nov 2018 19:00:24 +0000 (UTC) [thread overview]
Message-ID: <43cde6255c890f944700accf8769e73786794342.1543517818.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1543517818.git.christophe.leroy@c-s.fr>
setibat() and clearibat() allows to manipulate IBATs independently
of DBATs.
update_bats() allows to update bats after init. This is done
with MMU off.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/book3s/32/mmu-hash.h | 2 ++
arch/powerpc/kernel/head_32.S | 35 +++++++++++++++++++++++++++
arch/powerpc/mm/ppc_mmu_32.c | 32 ++++++++++++++++++++++++
3 files changed, 69 insertions(+)
diff --git a/arch/powerpc/include/asm/book3s/32/mmu-hash.h b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
index e38c91388c40..b4ccb832d4fb 100644
--- a/arch/powerpc/include/asm/book3s/32/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
@@ -83,6 +83,8 @@ typedef struct {
unsigned long vdso_base;
} mm_context_t;
+void update_bats(void);
+
#endif /* !__ASSEMBLY__ */
/* We happily ignore the smaller BATs on 601, we don't actually use
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index d1c39b5ccfd6..0f4c72ebb151 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -1101,6 +1101,41 @@ BEGIN_MMU_FTR_SECTION
END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
blr
+_ENTRY(update_bats)
+ lis r4, 1f@h
+ ori r4, r4, 1f@l
+ tophys(r4, r4)
+ mfmsr r6
+ mflr r7
+ li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR)
+ rlwinm r0, r6, 0, ~MSR_RI
+ rlwinm r0, r0, 0, ~MSR_EE
+ mtmsr r0
+ mtspr SPRN_SRR0, r4
+ mtspr SPRN_SRR1, r3
+ SYNC
+ RFI
+1: bl clear_bats
+ lis r3, BATS@ha
+ addi r3, r3, BATS@l
+ tophys(r3, r3)
+ LOAD_BAT(0, r3, r4, r5)
+ LOAD_BAT(1, r3, r4, r5)
+ LOAD_BAT(2, r3, r4, r5)
+ LOAD_BAT(3, r3, r4, r5)
+BEGIN_MMU_FTR_SECTION
+ LOAD_BAT(4, r3, r4, r5)
+ LOAD_BAT(5, r3, r4, r5)
+ LOAD_BAT(6, r3, r4, r5)
+ LOAD_BAT(7, r3, r4, r5)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
+ li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI)
+ mtmsr r3
+ mtspr SPRN_SRR0, r7
+ mtspr SPRN_SRR1, r6
+ SYNC
+ RFI
+
flush_tlbs:
lis r10, 0x40
1: addic. r10, r10, -0x1000
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 1078095d9407..58dd71686707 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -105,6 +105,38 @@ static unsigned int block_size(unsigned long base, unsigned long top)
return min3(max_size, 1U << base_shift, 1U << block_shift);
}
+/*
+ * Set up one of the IBAT (block address translation) register pairs.
+ * The parameters are not checked; in particular size must be a power
+ * of 2 between 128k and 256M.
+ * Only for 603+ ...
+ */
+static void setibat(int index, unsigned long virt, phys_addr_t phys,
+ unsigned int size, pgprot_t prot)
+{
+ unsigned int bl = (size >> 17) - 1;
+ int wimgxpp;
+ struct ppc_bat *bat = BATS[index];
+ unsigned long flags = pgprot_val(prot);
+
+ if (!cpu_has_feature(CPU_FTR_NEED_COHERENT))
+ flags &= ~_PAGE_COHERENT;
+
+ wimgxpp = (flags & _PAGE_COHERENT) | (_PAGE_EXEC ? BPP_RX : BPP_XX);
+ bat[0].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
+ bat[0].batl = BAT_PHYS_ADDR(phys) | wimgxpp;
+ if (flags & _PAGE_USER)
+ bat[0].batu |= 1; /* Vp = 1 */
+}
+
+static void clearibat(int index)
+{
+ struct ppc_bat *bat = BATS[index];
+
+ bat[0].batu = 0;
+ bat[0].batl = 0;
+}
+
unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
{
int idx;
--
2.13.3
next prev parent reply other threads:[~2018-11-29 19:00 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-29 19:00 [PATCH v1 00/13] powerpc/32s: Use BATs for STRICT_KERNEL_RWX Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 01/13] powerpc/mm: add exec protection on powerpc 603 Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 02/13] powerpc/mm/32: add base address to mmu_mapin_ram() Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 03/13] powerpc/mm/32s: rework mmu_mapin_ram() Christophe Leroy
2018-12-03 21:55 ` Jonathan Neuschäfer
2018-12-13 12:16 ` Christophe Leroy
2018-12-13 14:51 ` Christophe Leroy
2018-12-17 1:28 ` Jonathan Neuschäfer
2018-12-17 9:29 ` Christophe Leroy
2018-12-18 3:05 ` Jonathan Neuschäfer
2018-12-18 9:18 ` Christophe Leroy
2018-12-18 14:07 ` Jonathan Neuschäfer
2018-12-18 14:15 ` Christophe Leroy
2018-12-18 14:55 ` Christophe Leroy
2018-12-18 15:04 ` Christophe Leroy
2018-12-18 17:04 ` Jonathan Neuschäfer
2018-12-18 18:13 ` Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 04/13] powerpc/mm/32s: use generic mmu_mapin_ram() for all blocks Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 05/13] powerpc/wii: remove wii_mmu_mapin_mem2() Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 06/13] powerpc/mm/32s: use _PAGE_EXEC in setbat() Christophe Leroy
2018-11-29 19:00 ` Christophe Leroy [this message]
2018-11-29 19:00 ` [PATCH v1 08/13] powerpc/32: add helper to write into segment registers Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 09/13] powerpc/mmu: add is_strict_kernel_rwx() helper Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 10/13] powerpc/kconfig: define PAGE_SHIFT inside Kconfig Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 11/13] powerpc/kconfig: define CONFIG_DATA_SHIFT and CONFIG_ETEXT_SHIFT Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 12/13] powerpc/mm/32s: Use BATs for STRICT_KERNEL_RWX Christophe Leroy
2018-11-29 19:00 ` [PATCH v1 13/13] powerpc/kconfig: make _etext and data areas alignment configurable on Book3s 32 Christophe Leroy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=43cde6255c890f944700accf8769e73786794342.1543517818.git.christophe.leroy@c-s.fr \
--to=christophe.leroy@c-s.fr \
--cc=benh@kernel.crashing.org \
--cc=j.neuschaefer@gmx.net \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mpe@ellerman.id.au \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).