From: Jiada Wang <jiada_wang@mentor.com>
To: <lgirdwood@gmail.com>, <broonie@kernel.org>, <perex@perex.cz>,
<tiwai@suse.com>, <kuninori.morimoto.gx@renesas.com>,
<vladimir_zapolskiy@mentor.com>
Cc: <alsa-devel@alsa-project.org>, <linux-kernel@vger.kernel.org>,
<jiada_wang@mentor.com>
Subject: [PATCH linux-next v3 4/7] clk: renesas: r8a77995: Add ADG clock
Date: Wed, 5 Dec 2018 16:48:16 +0900 [thread overview]
Message-ID: <20181205074819.27944-5-jiada_wang@mentor.com> (raw)
In-Reply-To: <20181205074819.27944-1-jiada_wang@mentor.com>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds ADG clock to the R8A77995 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
---
drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index 47e60e3dbe05..933084d896e3 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -165,6 +165,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
DEF_MOD("can-fd", 914, R8A77995_CLK_S3D2),
DEF_MOD("can-if1", 915, R8A77995_CLK_S3D4),
DEF_MOD("can-if0", 916, R8A77995_CLK_S3D4),
+ DEF_MOD("adg", 922, R8A77995_CLK_ZA8),
DEF_MOD("i2c3", 928, R8A77995_CLK_S3D2),
DEF_MOD("i2c2", 929, R8A77995_CLK_S3D2),
DEF_MOD("i2c1", 930, R8A77995_CLK_S3D2),
--
2.19.2
prev parent reply other threads:[~2018-12-05 7:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-05 7:48 [PATCH linux-next v3 0/7] clk: renesas: adg: add AVB Clock Jiada Wang
2018-12-05 7:48 ` [PATCH linux-next v3 1/7] clk: renesas: r8a7795: Add ADG clock Jiada Wang
2018-12-05 7:48 ` [PATCH linux-next v3 2/7] clk: renesas: r8a7796: " Jiada Wang
2018-12-05 7:48 ` [PATCH linux-next v3 3/7] clk: renesas: r8a77990: " Jiada Wang
2018-12-05 7:48 ` Jiada Wang [this message]
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