From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devel@driverdev.osuosl.org
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-sunxi@googlegroups.com, Hans Verkuil <hverkuil@xs4all.nl>,
Sakari Ailus <sakari.ailus@linux.intel.com>
Subject: [PATCH v2 08/15] ARM/arm64: sunxi: Move H3/H5 syscon label over to soc-specific nodes
Date: Wed, 5 Dec 2018 10:24:37 +0100 [thread overview]
Message-ID: <20181205092444.29497-9-paul.kocialkowski@bootlin.com> (raw)
In-Reply-To: <20181205092444.29497-1-paul.kocialkowski@bootlin.com>
The EMAC driver requires a syscon node to access the EMAC clock
configuration register (that is part of the system-control register
range and controlled). For this purpose, a dummy syscon node was
introduced to let the driver access the register freely.
Recently, the EMAC driver was tuned to get access to the register when
the SRAM driver is registered (as used on the A64). As a result, it is
no longer necessary to have a dummy syscon node for that purpose.
Now that we have a proper system-control node for both the H3 and H5,
we can get rid of that dummy syscon node and have the EMAC driver use
the node corresponding to the proper SRAM driver (by switching the
syscon label over to each dtsi). This way, we no longer have two
separate nodes for the same register space.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ------
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 2 +-
3 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e438e54580e1..a858d91dd4c6 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -120,7 +120,7 @@
};
soc {
- system-control@1c00000 {
+ syscon: system-control@1c00000 {
compatible = "allwinner,sun8i-h3-system-control";
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 0d9e9eac518c..ed5846982685 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -152,12 +152,6 @@
};
};
- syscon: syscon@1c00000 {
- compatible = "allwinner,sun8i-h3-system-controller",
- "syscon";
- reg = <0x01c00000 0x1000>;
- };
-
dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 42bfb560b367..4e9025431e9f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -94,7 +94,7 @@
};
soc {
- system-control@1c00000 {
+ syscon: system-control@1c00000 {
compatible = "allwinner,sun50i-h5-system-control";
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
--
2.19.2
next prev parent reply other threads:[~2018-12-05 9:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-05 9:24 [PATCH v2 00/15] Cedrus H5 and A64 support with A33 and H3 updates Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 01/15] ARM: dts: sun8i: h3: Fix the system-control register range Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 02/15] ARM: dts: sun8i: a33: Remove unnecessary reserved memory node Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 03/15] ARM: dts: sun8i: h3: " Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 04/15] soc: sunxi: sram: Enable EMAC clock access for H3 variant Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 05/15] dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 06/15] soc: sunxi: sram: Add support for the H5 SoC system control Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 07/15] arm64: dts: allwinner: h5: Add system-control node with SRAM C1 Paul Kocialkowski
2018-12-05 9:45 ` Chen-Yu Tsai
2018-12-05 9:48 ` Paul Kocialkowski
2018-12-05 9:49 ` Chen-Yu Tsai
2018-12-05 9:53 ` Paul Kocialkowski
2018-12-05 9:24 ` Paul Kocialkowski [this message]
2018-12-05 9:24 ` [PATCH v2 09/15] dt-bindings: sram: sunxi: Add compatible for the A64 " Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 10/15] arm64: dts: allwinner: a64: Add support for the SRAM C1 section Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 11/15] dt-bindings: media: cedrus: Add compatibles for the A64 and H5 Paul Kocialkowski
2018-12-05 11:00 ` Maxime Ripard
2018-12-05 9:24 ` [PATCH v2 12/15] media: cedrus: Add device-tree compatible and variant for H5 support Paul Kocialkowski
2018-12-05 11:00 ` Maxime Ripard
2018-12-05 9:24 ` [PATCH v2 13/15] media: cedrus: Add device-tree compatible and variant for A64 support Paul Kocialkowski
2018-12-05 11:01 ` Maxime Ripard
2018-12-05 9:24 ` [PATCH v2 14/15] arm64: dts: allwinner: h5: Add Video Engine node Paul Kocialkowski
2018-12-05 9:24 ` [PATCH v2 15/15] arm64: dts: allwinner: a64: " Paul Kocialkowski
2018-12-07 21:22 ` [linux-sunxi] " Jernej Škrabec
2018-12-10 9:00 ` Paul Kocialkowski
2018-12-05 9:48 ` [PATCH v2 00/15] Cedrus H5 and A64 support with A33 and H3 updates Chen-Yu Tsai
2018-12-05 11:07 ` Maxime Ripard
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