From: cezary.gapinski@gmail.com
To: Mark Brown <broonie@kernel.org>,
linux-spi@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Amelie Delaunay <amelie.delaunay@st.com>,
Mark Rutland <mark.rutland@arm.com>,
Cezary Gapinski <cezary.gapinski@gmail.com>
Subject: [PATCH 4/5] ARM: dts: stm32: add SPI support on STM32F429 SoC
Date: Sun, 9 Dec 2018 14:53:55 +0100 [thread overview]
Message-ID: <1544363636-12161-5-git-send-email-cezary.gapinski@gmail.com> (raw)
In-Reply-To: <1544363636-12161-1-git-send-email-cezary.gapinski@gmail.com>
From: Cezary Gapinski <cezary.gapinski@gmail.com>
This patch adds all SPI instances of the STM32F429 SoC.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
---
arch/arm/boot/dts/stm32f429.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 8d6f028..8dbec00 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -314,6 +314,26 @@
status = "disabled";
};
+ spi2: spi@40003800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f4-spi";
+ reg = <0x40003800 0x400>;
+ interrupts = <36>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI2)>;
+ status = "disabled";
+ };
+
+ spi3: spi@40003C00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f4-spi";
+ reg = <0x40003C00 0x400>;
+ interrupts = <51>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI3)>;
+ status = "disabled";
+ };
+
usart2: serial@40004400 {
compatible = "st,stm32-uart";
reg = <0x40004400 0x400>;
@@ -523,6 +543,26 @@
status = "disabled";
};
+ spi1: spi@40013000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f4-spi";
+ reg = <0x40013000 0x400>;
+ interrupts = <35>;
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI1)>;
+ status = "disabled";
+ };
+
+ spi4: spi@40013400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f4-spi";
+ reg = <0x40013400 0x400>;
+ interrupts = <84>;
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI4)>;
+ status = "disabled";
+ };
+
syscfg: system-config@40013800 {
compatible = "syscon";
reg = <0x40013800 0x400>;
@@ -587,6 +627,26 @@
};
};
+ spi5: spi@40015000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f4-spi";
+ reg = <0x40015000 0x400>;
+ interrupts = <85>;
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>;
+ status = "disabled";
+ };
+
+ spi6: spi@40015400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f4-spi";
+ reg = <0x40015400 0x400>;
+ interrupts = <86>;
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI6)>;
+ status = "disabled";
+ };
+
pwrcfg: power-config@40007000 {
compatible = "syscon";
reg = <0x40007000 0x400>;
--
2.7.4
next prev parent reply other threads:[~2018-12-09 13:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-09 13:53 [PATCH 0/5] Add support for STM32F4 SPI cezary.gapinski
2018-12-09 13:53 ` [PATCH 1/5] spi: stm32: rename STM32 SPI registers and functions to STM32H7 cezary.gapinski
2018-12-09 13:53 ` [PATCH 2/5] spi: stm32: rename spi-stm32 to spi-stm32h7 cezary.gapinski
2018-12-09 13:53 ` [PATCH 3/5] spi: stm32: add driver for STM32F4 controller cezary.gapinski
2018-12-09 13:53 ` cezary.gapinski [this message]
2019-02-04 8:23 ` [PATCH 4/5] ARM: dts: stm32: add SPI support on STM32F429 SoC Alexandre Torgue
2018-12-09 13:53 ` [PATCH 5/5] spi: stm32: add description about STM32F4 bindings cezary.gapinski
2018-12-14 22:48 ` kbuild test robot
2018-12-20 19:49 ` Rob Herring
2018-12-10 12:37 ` [PATCH 0/5] Add support for STM32F4 SPI Amelie DELAUNAY
2018-12-10 19:05 ` Cezary Gapiński
2018-12-17 12:51 ` Amelie DELAUNAY
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1544363636-12161-5-git-send-email-cezary.gapinski@gmail.com \
--to=cezary.gapinski@gmail.com \
--cc=alexandre.torgue@st.com \
--cc=amelie.delaunay@st.com \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=mark.rutland@arm.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).