[5/5] spi: stm32: add description about STM32F4 bindings
diff mbox series

Message ID 1544363636-12161-6-git-send-email-cezary.gapinski@gmail.com
State Superseded
Headers show
Series
  • Add support for STM32F4 SPI
Related show

Commit Message

Cezary GapiƄski Dec. 9, 2018, 1:53 p.m. UTC
From: Cezary Gapinski <cezary.gapinski@gmail.com>

Add description that STM32F4 can be used in compatible property.
Master Inter-Data Idleness optional property cannot be used in STM32F4.

Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
---
 Documentation/devicetree/bindings/spi/spi-stm32.txt | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

Comments

kernel test robot Dec. 14, 2018, 10:48 p.m. UTC | #1
Hi Cezary,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on spi/for-next]
[also build test WARNING on v4.20-rc6 next-20181214]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/cezary-gapinski-gmail-com/spi-stm32-rename-STM32-SPI-registers-and-functions-to-STM32H7/20181210-075839
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All warnings (new ones prefixed by >>):

>> drivers/spi/spi-stm32h7.c:1134:45: warning: Using plain integer as NULL pointer

vim +1134 drivers/spi/spi-stm32h7.c

dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1091  
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1092  static int stm32h7_spi_probe(struct platform_device *pdev)
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1093  {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1094  	struct spi_master *master;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1095  	struct stm32h7_spi *spi;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1096  	struct resource *res;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1097  	int i, ret;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1098  
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1099  	master = spi_alloc_master(&pdev->dev, sizeof(struct stm32h7_spi));
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1100  	if (!master) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1101  		dev_err(&pdev->dev, "spi master allocation failed\n");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1102  		return -ENOMEM;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1103  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1104  	platform_set_drvdata(pdev, master);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1105  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1106  	spi = spi_master_get_devdata(master);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1107  	spi->dev = &pdev->dev;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1108  	spi->master = master;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1109  	spin_lock_init(&spi->lock);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1110  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1111  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1112  	spi->base = devm_ioremap_resource(&pdev->dev, res);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1113  	if (IS_ERR(spi->base)) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1114  		ret = PTR_ERR(spi->base);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1115  		goto err_master_put;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1116  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1117  	spi->phys_addr = (dma_addr_t)res->start;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1118  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1119  	spi->irq = platform_get_irq(pdev, 0);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1120  	if (spi->irq <= 0) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1121  		dev_err(&pdev->dev, "no irq: %d\n", spi->irq);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1122  		ret = -ENOENT;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1123  		goto err_master_put;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1124  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1125  	ret = devm_request_threaded_irq(&pdev->dev, spi->irq, NULL,
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1126  					stm32h7_spi_irq, IRQF_ONESHOT,
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1127  					pdev->name, master);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1128  	if (ret) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1129  		dev_err(&pdev->dev, "irq%d request failed: %d\n", spi->irq,
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1130  			ret);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1131  		goto err_master_put;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1132  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1133  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21 @1134  	spi->clk = devm_clk_get(&pdev->dev, 0);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1135  	if (IS_ERR(spi->clk)) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1136  		ret = PTR_ERR(spi->clk);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1137  		dev_err(&pdev->dev, "clk get failed: %d\n", ret);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1138  		goto err_master_put;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1139  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1140  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1141  	ret = clk_prepare_enable(spi->clk);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1142  	if (ret) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1143  		dev_err(&pdev->dev, "clk enable failed: %d\n", ret);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1144  		goto err_master_put;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1145  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1146  	spi->clk_rate = clk_get_rate(spi->clk);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1147  	if (!spi->clk_rate) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1148  		dev_err(&pdev->dev, "clk rate = 0\n");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1149  		ret = -EINVAL;
3dbb3eef drivers/spi/spi-stm32.c Alexey Khoroshilov 2018-03-30  1150  		goto err_clk_disable;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1151  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1152  
d5e9a4a4 drivers/spi/spi-stm32.c Philipp Zabel      2017-07-19  1153  	spi->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1154  	if (!IS_ERR(spi->rst)) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1155  		reset_control_assert(spi->rst);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1156  		udelay(2);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1157  		reset_control_deassert(spi->rst);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1158  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1159  
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1160  	spi->fifo_size = stm32h7_spi_get_fifo_size(spi);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1161  
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1162  	ret = stm32h7_spi_config(spi);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1163  	if (ret) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1164  		dev_err(&pdev->dev, "controller configuration failed: %d\n",
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1165  			ret);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1166  		goto err_clk_disable;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1167  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1168  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1169  	master->dev.of_node = pdev->dev.of_node;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1170  	master->auto_runtime_pm = true;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1171  	master->bus_num = pdev->id;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1172  	master->mode_bits = SPI_MODE_3 | SPI_CS_HIGH | SPI_LSB_FIRST |
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1173  			    SPI_3WIRE | SPI_LOOP;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1174  	master->bits_per_word_mask = stm32h7_spi_get_bpw_mask(spi);
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1175  	master->max_speed_hz = spi->clk_rate / STM32H7_SPI_MBR_DIV_MIN;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1176  	master->min_speed_hz = spi->clk_rate / STM32H7_SPI_MBR_DIV_MAX;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1177  	master->setup = stm32h7_spi_setup;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1178  	master->prepare_message = stm32h7_spi_prepare_msg;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1179  	master->transfer_one = stm32h7_spi_transfer_one;
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1180  	master->unprepare_message = stm32h7_spi_unprepare_msg;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1181  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1182  	spi->dma_tx = dma_request_slave_channel(spi->dev, "tx");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1183  	if (!spi->dma_tx)
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1184  		dev_warn(&pdev->dev, "failed to request tx dma channel\n");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1185  	else
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1186  		master->dma_tx = spi->dma_tx;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1187  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1188  	spi->dma_rx = dma_request_slave_channel(spi->dev, "rx");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1189  	if (!spi->dma_rx)
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1190  		dev_warn(&pdev->dev, "failed to request rx dma channel\n");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1191  	else
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1192  		master->dma_rx = spi->dma_rx;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1193  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1194  	if (spi->dma_tx || spi->dma_rx)
52721092 drivers/spi/spi-stm32.c Cezary Gapinski    2018-12-09  1195  		master->can_dma = stm32h7_spi_can_dma;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1196  
038ac869 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-27  1197  	pm_runtime_set_active(&pdev->dev);
038ac869 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-27  1198  	pm_runtime_enable(&pdev->dev);
038ac869 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-27  1199  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1200  	ret = devm_spi_register_master(&pdev->dev, master);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1201  	if (ret) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1202  		dev_err(&pdev->dev, "spi master registration failed: %d\n",
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1203  			ret);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1204  		goto err_dma_release;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1205  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1206  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1207  	if (!master->cs_gpios) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1208  		dev_err(&pdev->dev, "no CS gpios available\n");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1209  		ret = -EINVAL;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1210  		goto err_dma_release;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1211  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1212  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1213  	for (i = 0; i < master->num_chipselect; i++) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1214  		if (!gpio_is_valid(master->cs_gpios[i])) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1215  			dev_err(&pdev->dev, "%i is not a valid gpio\n",
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1216  				master->cs_gpios[i]);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1217  			ret = -EINVAL;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1218  			goto err_dma_release;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1219  		}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1220  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1221  		ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1222  					DRIVER_NAME);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1223  		if (ret) {
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1224  			dev_err(&pdev->dev, "can't get CS gpio %i\n",
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1225  				master->cs_gpios[i]);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1226  			goto err_dma_release;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1227  		}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1228  	}
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1229  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1230  	dev_info(&pdev->dev, "driver initialized\n");
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1231  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1232  	return 0;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1233  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1234  err_dma_release:
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1235  	if (spi->dma_tx)
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1236  		dma_release_channel(spi->dma_tx);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1237  	if (spi->dma_rx)
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1238  		dma_release_channel(spi->dma_rx);
038ac869 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-27  1239  
038ac869 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-27  1240  	pm_runtime_disable(&pdev->dev);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1241  err_clk_disable:
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1242  	clk_disable_unprepare(spi->clk);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1243  err_master_put:
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1244  	spi_master_put(master);
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1245  
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1246  	return ret;
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1247  }
dcbe0d84 drivers/spi/spi-stm32.c Amelie Delaunay    2017-06-21  1248  

:::::: The code at line 1134 was first introduced by commit
:::::: dcbe0d84dfa5a3e72b8e6ce622cd5ac78abbcab8 spi: add driver for STM32 SPI controller

:::::: TO: Amelie Delaunay <amelie.delaunay@st.com>
:::::: CC: Mark Brown <broonie@kernel.org>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
Rob Herring Dec. 20, 2018, 7:49 p.m. UTC | #2
On Sun,  9 Dec 2018 14:53:56 +0100, cezary.gapinski@gmail.com wrote:
> From: Cezary Gapinski <cezary.gapinski@gmail.com>
> 
> Add description that STM32F4 can be used in compatible property.
> Master Inter-Data Idleness optional property cannot be used in STM32F4.
> 
> Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
> ---
>  Documentation/devicetree/bindings/spi/spi-stm32.txt | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
index 1b3fa2c1..d82755c 100644
--- a/Documentation/devicetree/bindings/spi/spi-stm32.txt
+++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
@@ -7,7 +7,9 @@  from 4 to 32-bit data size. Although it can be configured as master or slave,
 only master is supported by the driver.
 
 Required properties:
-- compatible: Must be "st,stm32h7-spi".
+- compatible: Should be one of:
+  "st,stm32h7-spi"
+  "st,stm32f4-spi"
 - reg: Offset and length of the device's register set.
 - interrupts: Must contain the interrupt id.
 - clocks: Must contain an entry for spiclk (which feeds the internal clock
@@ -30,8 +32,9 @@  Child nodes represent devices on the SPI bus
   See ../spi/spi-bus.txt
 
 Optional properties:
-- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
-		  nanoseconds inserted between two consecutive data frames.
+- st,spi-midi-ns: Only for STM32H7, (Master Inter-Data Idleness) minimum time
+		  delay in nanoseconds inserted between two consecutive data
+		  frames.
 
 
 Example: