From: Anson Huang <anson.huang@nxp.com>
To: "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc: dl-linux-imx <linux-imx@nxp.com>
Subject: [PATCH V2] dt-bindings: timer: gpt: update binding doc
Date: Wed, 12 Dec 2018 07:20:44 +0000 [thread overview]
Message-ID: <1544598889-2995-1-git-send-email-Anson.Huang@nxp.com> (raw)
The i.MX GPT timer driver binding doc is out of date,
update it according to current GPT timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
.../devicetree/bindings/timer/fsl,imxgpt.txt | 28 +++++++++++++++++-----
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
index 9809b11..2ed84ad 100644
--- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
+++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
@@ -2,17 +2,33 @@ Freescale i.MX General Purpose Timer (GPT)
Required properties:
-- compatible : should be "fsl,<soc>-gpt"
-- reg : Specifies base physical address and size of the registers.
-- interrupts : A list of 4 interrupts; one per timer channel.
-- clocks : The clocks provided by the SoC to drive the timer.
+- compatible : must be one of following:
+ - "fsl,imx1-gpt",
+ - "fsl,imx21-gpt",
+ - "fsl,imx27-gpt",
+ - "fsl,imx31-gpt",
+ - "fsl,imx25-gpt",
+ - "fsl,imx50-gpt",
+ - "fsl,imx51-gpt",
+ - "fsl,imx53-gpt",
+ - "fsl,imx6q-gpt",
+ - "fsl,imx6dl-gpt",
+ - "fsl,imx6sl-gpt",
+ - "fsl,imx6sx-gpt".
+- reg : specifies base physical address and size of the registers.
+- interrupts : should be the clock event device interrupt.
+- clocks : the clocks provided by the SoC to drive the timer, must contain
+ an entry for each entry in clock-names.
+- clock-names : must include "ipg" entry first, then "per" entry, "osc_per"
+ can be a substitute of "per" entry on some SoCs.
Example:
gpt1: timer@10003000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
+ compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
reg = <0x10003000 0x1000>;
interrupts = <26>;
- clocks = <&clks 46>, <&clks 61>;
+ clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
+ <&clks IMX27_CLK_PER1_GATE>;
clock-names = "ipg", "per";
};
--
2.7.4
next reply other threads:[~2018-12-12 7:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-12 7:20 Anson Huang [this message]
2018-12-18 17:11 ` [PATCH V2] dt-bindings: timer: gpt: update binding doc Rob Herring
2018-12-19 7:11 ` Anson Huang
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