From: Qian Cai <cai@lca.pw>
To: catalin.marinas@arm.com, will.deacon@arm.com
Cc: marc.zyngier@arm.com, james.morse@arm.com,
takahiro.akashi@linaro.org, ard.biesheuvel@linaro.org,
linux-arm-kernel@lists.infradead.org, kexec@lists.infradead.org,
linux-kernel@vger.kernel.org, Qian Cai <cai@lca.pw>
Subject: [PATCH] arm64: invalidate TLB before turning MMU on
Date: Thu, 13 Dec 2018 00:22:59 -0500 [thread overview]
Message-ID: <20181213052259.56352-1-cai@lca.pw> (raw)
In-Reply-To: <1544654224.18411.11.camel@lca.pw>
On this HPE Apollo 70 arm64 server with 256 CPUs, triggering a crash
dump just hung. It has 4 threads on each core. Each 2-core share a same
L1 and L2 caches, so that is 8 CPUs shares those. All CPUs share a same
L3 cache.
It turned out that this was due to the TLB contained stale entries (or
uninitialized junk which just happened to look valid) from the first
kernel before turning the MMU on in the second kernel which caused this
instruction hung,
msr sctlr_el1, x0
Signed-off-by: Qian Cai <cai@lca.pw>
---
arch/arm64/kernel/head.S | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4471f570a295..5196f3d729de 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -771,6 +771,10 @@ ENTRY(__enable_mmu)
msr ttbr0_el1, x2 // load TTBR0
msr ttbr1_el1, x1 // load TTBR1
isb
+ dsb nshst
+ tlbi vmalle1 // invalidate TLB
+ dsb nsh
+ isb
msr sctlr_el1, x0
isb
/*
--
2.17.2 (Apple Git-113)
next parent reply other threads:[~2018-12-13 5:23 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1544654224.18411.11.camel@lca.pw>
2018-12-13 5:22 ` Qian Cai [this message]
2018-12-13 5:40 ` [PATCH] arm64: invalidate TLB before turning MMU on Bhupesh Sharma
2018-12-13 13:39 ` Qian Cai
2018-12-13 10:44 ` James Morse
2018-12-13 13:44 ` Qian Cai
2018-12-14 4:08 ` [PATCH v2] arm64: invalidate TLB just " Qian Cai
2018-12-14 5:01 ` Bhupesh Sharma
2018-12-14 12:54 ` Qian Cai
2018-12-14 7:23 ` Ard Biesheuvel
2018-12-15 1:53 ` Qian Cai
2019-01-10 20:00 ` Bhupesh Sharma
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