From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>,
p.zabel@pengutronix.de, Fabio Estevam <fabio.estevam@nxp.com>,
cphealy@gmail.com, l.stach@pengutronix.de,
Leonard Crestez <leonard.crestez@nxp.com>,
"A.s. Dong" <aisheng.dong@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>, Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
Date: Sun, 16 Dec 2018 18:38:26 -0800 [thread overview]
Message-ID: <20181217023827.7947-3-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20181217023827.7947-1-andrew.smirnov@gmail.com>
The driver now supports i.MX8MQ, so update bindings accordingly.
Cc: p.zabel@pengutronix.de
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
.../bindings/reset/fsl,imx7-src.txt | 7 +-
include/dt-bindings/reset/imx8mq-reset.h | 64 +++++++++++++++++++
2 files changed, 69 insertions(+), 2 deletions(-)
create mode 100644 include/dt-bindings/reset/imx8mq-reset.h
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
index 1ab1d109318e..2ecf33815d18 100644
--- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
+++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
@@ -5,7 +5,9 @@ Please also refer to reset.txt in this directory for common reset
controller binding usage.
Required properties:
-- compatible: Should be "fsl,imx7d-src", "syscon"
+- compatible:
+ - For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"
+ - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"
- reg: should be register base and length as documented in the
datasheet
- interrupts: Should contain SRC interrupt
@@ -44,4 +46,5 @@ Example:
For list of all valid reset indicies see
-<dt-bindings/reset/imx7-reset.h>
+<dt-bindings/reset/imx7-reset.h> for i.MX7 and
+<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ
diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h
new file mode 100644
index 000000000000..57c592498aa0
--- /dev/null
+++ b/include/dt-bindings/reset/imx8mq-reset.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Zodiac Inflight Innovations
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ */
+
+#ifndef DT_BINDING_RESET_IMX8MQ_H
+#define DT_BINDING_RESET_IMX8MQ_H
+
+#define IMX8MQ_RESET_A53_CORE_POR_RESET0 0
+#define IMX8MQ_RESET_A53_CORE_POR_RESET1 1
+#define IMX8MQ_RESET_A53_CORE_POR_RESET2 2
+#define IMX8MQ_RESET_A53_CORE_POR_RESET3 3
+#define IMX8MQ_RESET_A53_CORE_RESET0 4
+#define IMX8MQ_RESET_A53_CORE_RESET1 5
+#define IMX8MQ_RESET_A53_CORE_RESET2 6
+#define IMX8MQ_RESET_A53_CORE_RESET3 7
+#define IMX8MQ_RESET_A53_DBG_RESET0 8
+#define IMX8MQ_RESET_A53_DBG_RESET1 9
+#define IMX8MQ_RESET_A53_DBG_RESET2 10
+#define IMX8MQ_RESET_A53_DBG_RESET3 11
+#define IMX8MQ_RESET_A53_ETM_RESET0 12
+#define IMX8MQ_RESET_A53_ETM_RESET1 13
+#define IMX8MQ_RESET_A53_ETM_RESET2 14
+#define IMX8MQ_RESET_A53_ETM_RESET3 15
+#define IMX8MQ_RESET_A53_SOC_DBG_RESET 16
+#define IMX8MQ_RESET_A53_L2RESET 17
+#define IMX8MQ_RESET_SW_NON_SCLR_M4C_RST 18
+#define IMX8MQ_RESET_OTG1_PHY_RESET 19
+#define IMX8MQ_RESET_OTG2_PHY_RESET 20
+#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21
+#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22
+#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23
+#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24
+#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25
+#define IMX8MQ_RESET_PCIEPHY 26
+#define IMX8MQ_RESET_PCIEPHY_PERST 27
+#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
+#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29
+#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30
+#define IMX8MQ_RESET_DISP_RESET 31
+#define IMX8MQ_RESET_GPU_RESET 32
+#define IMX8MQ_RESET_VPU_RESET 33
+#define IMX8MQ_RESET_PCIEPHY2 34
+#define IMX8MQ_RESET_PCIEPHY2_PERST 35
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37
+#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38
+#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39
+#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40
+#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41
+#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42
+#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43
+#define IMX8MQ_RESET_DDRC1_PRST 44
+#define IMX8MQ_RESET_DDRC1_CORE_RESET 45
+#define IMX8MQ_RESET_DDRC1_PHY_RESET 46
+#define IMX8MQ_RESET_DDRC2_PRST 47
+#define IMX8MQ_RESET_DDRC2_CORE_RESET 48
+#define IMX8MQ_RESET_DDRC2_PHY_RESET 49
+
+#define IMX8MQ_RESET_NUM 50
+
+#endif
--
2.19.1
next prev parent reply other threads:[~2018-12-17 2:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-17 2:38 [PATCH v3 0/3] Reset controller support for i.MX8MQ Andrey Smirnov
2018-12-17 2:38 ` [PATCH v3 1/3] reset: imx7: Add plubming to support multiple IP variants Andrey Smirnov
2018-12-17 2:38 ` Andrey Smirnov [this message]
2018-12-17 4:37 ` [PATCH v3 2/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Baruch Siach
2018-12-17 7:39 ` Andrey Smirnov
2018-12-17 22:51 ` Rob Herring
2018-12-17 2:38 ` [PATCH v3 3/3] reset: imx7: Add support for i.MX8MQ IP block variant Andrey Smirnov
2018-12-17 4:30 ` Aisheng Dong
2018-12-17 17:09 ` Andrey Smirnov
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