linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rajendra Nayak <rnayak@codeaurora.org>
To: andy.gross@linaro.org, robh@kernel.org, viresh.kumar@linaro.org,
	sboyd@kernel.org, ulf.hansson@linaro.org,
	collinsd@codeaurora.org, mka@chromium.org
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, henryc.chen@mediatek.com,
	Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v9 01/10] dt-bindings: opp: Introduce opp-level bindings
Date: Mon,  7 Jan 2019 15:39:50 +0530	[thread overview]
Message-ID: <20190107100959.14528-2-rnayak@codeaurora.org> (raw)
In-Reply-To: <20190107100959.14528-1-rnayak@codeaurora.org>

On some SoCs (especially from Qualcomm and MediaTek) an OPP
node needs to describe an additional level/corner value
that is then communicated to a remote microprocessor by the CPU, which
then takes some actions (like adjusting voltage values across various rails)
based on the value passed.

Describe these bindings in the opp-level bindings document.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 .../devicetree/bindings/opp/opp-level.txt     | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/opp/opp-level.txt

diff --git a/Documentation/devicetree/bindings/opp/opp-level.txt b/Documentation/devicetree/bindings/opp/opp-level.txt
new file mode 100644
index 000000000000..f9134ed08164
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/opp-level.txt
@@ -0,0 +1,29 @@
+OPP level bindings to descibe OPP nodes with corner/level values
+
+OPP tables for devices on some SoCs, especially from Qualcomm and
+MediaTek require an additional platform specific corner/level
+value to be specified.
+This value is passed on to a Power Manager by
+the CPU, which then takes the necessary actions to set a voltage
+rail to an appropriate voltage based on the value passed.
+
+The bindings are based on top of the operating-points-v2 bindings
+described in Documentation/devicetree/bindings/opp/opp.txt,
+with the exception that all of the properties are now optional,
+including the opp-hz property.
+
+Additional properties are described below.
+
+* OPP Table Node
+
+Required properties:
+- compatible: Allow OPPs to express their compatibility. It should be:
+  "operating-points-v2-level"
+
+* OPP Node
+
+Required properties:
+- opp-level: On some SoC platforms an OPP node can describe a positive value
+representing a corner/level that's communicated with a remote microprocessor
+(usually called the power manager) which then translates it into a certain voltage on
+a voltage rail.
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2019-01-07 10:10 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-07 10:09 [PATCH v9 00/10] Add power domain driver for corners on msm8996/sdm845 Rajendra Nayak
2019-01-07 10:09 ` Rajendra Nayak [this message]
2019-01-08  4:49   ` [PATCH v9 01/10] dt-bindings: opp: Introduce opp-level bindings Viresh Kumar
2019-01-07 10:09 ` [PATCH v9 02/10] dt-bindings: power: Add qcom rpm power domain driver bindings Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 03/10] soc: qcom: rpmpd: Add a Power domain driver to model corners Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 04/10] soc: qcom: rpmpd: Add support for get/set performance state Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 05/10] arm64: dts: msm8996: Add rpmpd device node Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 06/10] soc: qcom: rpmhpd: Add RPMh power domain driver Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 07/10] arm64: dts: sdm845: Add rpmh powercontroller node Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 08/10] OPP: Add a dev_pm_opp_of_get_level() helper Rajendra Nayak
2019-01-08  4:54   ` Viresh Kumar
2019-01-07 10:09 ` [PATCH v9 09/10] soc: qcom: rpmpd: Use " Rajendra Nayak
2019-01-07 10:09 ` [PATCH v9 10/10] soc: qcom: rpmhpd: Mark mx as a parent for cx Rajendra Nayak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190107100959.14528-2-rnayak@codeaurora.org \
    --to=rnayak@codeaurora.org \
    --cc=andy.gross@linaro.org \
    --cc=collinsd@codeaurora.org \
    --cc=devicetree@vger.kernel.org \
    --cc=henryc.chen@mediatek.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mka@chromium.org \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=ulf.hansson@linaro.org \
    --cc=viresh.kumar@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).