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From: "Moger, Babu" <Babu.Moger@amd.com>
To: "fenghua.yu@intel.com" <fenghua.yu@intel.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"tony.luck@intel.com" <tony.luck@intel.com>,
	"peterz@infradead.org" <peterz@infradead.org>,
	"reinette.chatre@intel.com" <reinette.chatre@intel.com>,
	"Moger, Babu" <Babu.Moger@amd.com>,
	"james.morse@arm.com" <james.morse@arm.com>,
	"xiaochen.shen@intel.com" <xiaochen.shen@intel.com>,
	"ravi.v.shankar@intel.com" <ravi.v.shankar@intel.com>,
	"sai.praneeth.prakhya@intel.com" <sai.praneeth.prakhya@intel.com>,
	"arshiya.hayatkhan.pathan@intel.com" 
	<arshiya.hayatkhan.pathan@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-kselftest@vger.kernel.org"
	<linux-kselftest@vger.kernel.org>
Subject: [PATCH v5 05/13] selftests/resctrl: Add built in benchmark
Date: Fri, 18 Jan 2019 18:27:08 +0000	[thread overview]
Message-ID: <20190118182646.16594-6-babu.moger@amd.com> (raw)
In-Reply-To: <20190118182646.16594-1-babu.moger@amd.com>

From: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>

Built-in benchmark fill_buf generates stressful memory bandwidth
and cache traffic.

Later it will be used as a default benchmark by various resctrl tests
such as MBA (Memory Bandwidth Allocation) and MBM (Memory Bandwidth
Monitoring) tests.

Signed-off-by: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Signed-off-by: Arshiya Hayatkhan Pathan <arshiya.hayatkhan.pathan@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Babu Moger <babu.moger@amd.com>
---
 tools/testing/selftests/resctrl/fill_buf.c | 175 +++++++++++++++++++++++++++++
 1 file changed, 175 insertions(+)
 create mode 100644 tools/testing/selftests/resctrl/fill_buf.c

diff --git a/tools/testing/selftests/resctrl/fill_buf.c b/tools/testing/selftests/resctrl/fill_buf.c
new file mode 100644
index 0000000..d9950b5
--- /dev/null
+++ b/tools/testing/selftests/resctrl/fill_buf.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * fill_buf benchmark
+ *
+ * Copyright (C) 2018 Intel Corporation
+ *
+ * Authors:
+ *    Arshiya Hayatkhan Pathan <arshiya.hayatkhan.pathan@intel.com>
+ *    Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>,
+ *    Fenghua Yu <fenghua.yu@intel.com>
+ */
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/wait.h>
+#include <inttypes.h>
+#include <malloc.h>
+#include <string.h>
+
+#include "resctrl.h"
+
+#define CL_SIZE			(64)
+#define PAGE_SIZE		(4 * 1024)
+#define MB			(1024 * 1024)
+
+static unsigned char *startptr;
+
+static void sb(void)
+{
+	asm volatile("sfence\n\t"
+		     : : : "memory");
+}
+
+static void ctrl_handler(int signo)
+{
+	free(startptr);
+	printf("\nEnding\n");
+	sb();
+	exit(EXIT_SUCCESS);
+}
+
+static void cl_flush(void *p)
+{
+	asm volatile("clflush (%0)\n\t"
+		     : : "r"(p) : "memory");
+}
+
+static void mem_flush(void *p, size_t s)
+{
+	char *cp = (char *)p;
+	size_t i = 0;
+
+	s = s / CL_SIZE; /* mem size in cache llines */
+
+	for (i = 0; i < s; i++)
+		cl_flush(&cp[i * CL_SIZE]);
+
+	sb();
+}
+
+static void *malloc_and_init_memory(size_t s)
+{
+	uint64_t *p64;
+	size_t s64;
+
+	void *p = memalign(PAGE_SIZE, s);
+
+	p64 = (uint64_t *)p;
+	s64 = s / sizeof(uint64_t);
+
+	while (s64 > 0) {
+		*p64 = (uint64_t)rand();
+		p64 += (CL_SIZE / sizeof(uint64_t));
+		s64 -= (CL_SIZE / sizeof(uint64_t));
+	}
+
+	return p;
+}
+
+static void fill_cache_read(unsigned char *start_ptr, unsigned char *end_ptr)
+{
+	while (1) {
+		unsigned char sum, *p;
+
+		p = start_ptr;
+		/* Read two chars in each cache line to stress cache */
+		while (p < (end_ptr - 1024)) {
+			sum += p[0] + p[32] + p[64] + p[96] + p[128] +
+			       p[160] + p[192] + p[224] + p[256] + p[288] +
+			       p[320] + p[352] + p[384] + p[416] + p[448] +
+			       p[480] + p[512] + p[544] + p[576] + p[608] +
+			       p[640] + p[672] + p[704] + p[736] + p[768] +
+			       p[800] + p[832] + p[864] + p[896] + p[928] +
+			       p[960] + p[992];
+			p += 1024;
+		}
+	}
+}
+
+static void fill_cache_write(unsigned char *start_ptr, unsigned char *end_ptr)
+{
+	while (1) {
+		while (start_ptr < end_ptr) {
+			*start_ptr = '1';
+			start_ptr += (CL_SIZE / 2);
+		}
+		start_ptr = startptr;
+	}
+}
+
+static void
+fill_cache(unsigned long long buf_size, int malloc_and_init,
+	   int memflush, int op)
+{
+	unsigned char *start_ptr, *end_ptr;
+	unsigned long long i;
+
+	if (malloc_and_init) {
+		start_ptr = malloc_and_init_memory(buf_size);
+		printf("Started benchmark with memalign\n");
+	} else {
+		start_ptr = malloc(buf_size);
+		printf("Started benchmark with malloc\n");
+	}
+
+	if (!start_ptr)
+		return;
+
+	startptr = start_ptr;
+	end_ptr = start_ptr + buf_size;
+
+	/*
+	 * It's better to touch the memory once to avoid any compiler
+	 * optimizations
+	 */
+	if (!malloc_and_init) {
+		for (i = 0; i < buf_size; i++)
+			*start_ptr++ = (unsigned char)rand();
+	}
+
+	start_ptr = startptr;
+
+	/* Flush the memory before using to avoid "cache hot pages" effect */
+	if (memflush) {
+		mem_flush(start_ptr, buf_size);
+		printf("Started benchmark with memflush\n");
+	} else {
+		printf("Started benchmark *without* memflush\n");
+	}
+
+	if (op == 0)
+		fill_cache_read(start_ptr, end_ptr);
+	else
+		fill_cache_write(start_ptr, end_ptr);
+
+	free(startptr);
+}
+
+int run_fill_buf(int span, int malloc_and_init_memory, int memflush, int op)
+{
+	unsigned long long cache_size = span * MB;
+
+	/* set up ctrl-c handler */
+	if (signal(SIGINT, ctrl_handler) == SIG_ERR)
+		printf("Failed to catch SIGINT!\n");
+	if (signal(SIGHUP, ctrl_handler) == SIG_ERR)
+		printf("Failed to catch SIGHUP!\n");
+
+	printf("Cache size in Bytes = %llu\n", cache_size);
+
+	fill_cache(cache_size, malloc_and_init_memory, memflush, op);
+
+	return -1;
+}
-- 
1.8.3.1


  parent reply	other threads:[~2019-01-18 18:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-18 18:27 [PATCH v5 00/13] selftests/resctrl: Add resctrl selftest Moger, Babu
2019-01-18 18:27 ` [PATCH v5 01/13] selftests/resctrl: Add README for resctrl tests Moger, Babu
2019-01-18 18:27 ` [PATCH v5 02/13] selftests/resctrl: Add basic resctrl file system operations and data Moger, Babu
2019-01-18 18:27 ` [PATCH v5 03/13] selftests/resctrl: Read memory bandwidth from perf IMC counter and from resctrl file system Moger, Babu
2019-01-18 18:27 ` [PATCH v5 04/13] selftests/resctrl: Add callback to start a benchmark Moger, Babu
2019-01-18 18:27 ` Moger, Babu [this message]
2019-01-18 18:27 ` [PATCH v5 06/13] selftests/resctrl: Add MBM test Moger, Babu
2019-01-18 18:27 ` [PATCH v5 07/13] selftests/resctrl: Add MBA test Moger, Babu
2019-01-18 18:27 ` [PATCH v5 08/13] selftests/resctrl Add Cache QoS Monitoring (CQM) selftest Moger, Babu
2019-01-18 18:27 ` [PATCH v5 09/13] selftests/resctrl: Add Cache Allocation Technology (CAT) selftest Moger, Babu
2019-01-18 18:27 ` [PATCH v5 10/13] selftests/resctrl: Add the test in MAINTAINERS Moger, Babu
2019-01-18 18:27 ` [PATCH v5 11/13] selftests/resctrl: Add vendor detection mechanism Moger, Babu
2019-01-18 18:27 ` [PATCH v5 12/13] selftests/resctrl: Use cache index3 id for AMD schemata masks Moger, Babu
2019-01-18 18:27 ` [PATCH v5 13/13] selftests/resctrl: Disable MBA and MBM tests for AMD Moger, Babu

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