From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Chen-Yu Tsai <wens@csie.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-amarula@amarulasolutions.com, linux-sunxi@googlegroups.com,
Jagan Teki <jagan@amarulasolutions.com>
Subject: [PATCH v7 15/23] drm/sun4i: sun6i_mipi_dsi: Add has_mod_clk quirk
Date: Fri, 1 Feb 2019 21:12:24 +0530 [thread overview]
Message-ID: <20190201154232.10505-16-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190201154232.10505-1-jagan@amarulasolutions.com>
As per the user manual, look like mod clock is not mandatory
for all Allwinner MIPI DSI controllers, it is connected to
CLK_DSI_SCLK for A31 and not available in A64.
So add has_mod_clk quirk and process the clk accordingly.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 38 ++++++++++++++++++--------
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 5 ++++
2 files changed, 32 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index 9be414131460..de7d9dcb049f 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -10,6 +10,7 @@
#include <linux/component.h>
#include <linux/crc-ccitt.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/reset.h>
@@ -1099,6 +1100,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
dsi->dev = dev;
dsi->host.ops = &sun6i_dsi_host_ops;
dsi->host.dev = dev;
+ dsi->variant = of_device_get_match_data(dev);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
@@ -1126,17 +1128,20 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->reset);
}
- dsi->mod_clk = devm_clk_get(dev, "mod");
- if (IS_ERR(dsi->mod_clk)) {
- dev_err(dev, "Couldn't get the DSI mod clock\n");
- return PTR_ERR(dsi->mod_clk);
+ if (dsi->variant->has_mod_clk) {
+ dsi->mod_clk = devm_clk_get(dev, "mod");
+ if (IS_ERR(dsi->mod_clk)) {
+ dev_err(dev, "Couldn't get the DSI mod clock\n");
+ return PTR_ERR(dsi->mod_clk);
+ }
}
/*
* In order to operate properly, that clock seems to be always
* set to 297MHz.
*/
- clk_set_rate_exclusive(dsi->mod_clk, 297000000);
+ if (dsi->variant->has_mod_clk)
+ clk_set_rate_exclusive(dsi->mod_clk, 297000000);
dphy_node = of_parse_phandle(dev->of_node, "phys", 0);
ret = sun6i_dphy_probe(dsi, dphy_node);
@@ -1168,7 +1173,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
pm_runtime_disable(dev);
sun6i_dphy_remove(dsi);
err_unprotect_clk:
- clk_rate_exclusive_put(dsi->mod_clk);
+ if (dsi->variant->has_mod_clk)
+ clk_rate_exclusive_put(dsi->mod_clk);
return ret;
}
@@ -1181,7 +1187,8 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
mipi_dsi_host_unregister(&dsi->host);
pm_runtime_disable(dev);
sun6i_dphy_remove(dsi);
- clk_rate_exclusive_put(dsi->mod_clk);
+ if (dsi->variant->has_mod_clk)
+ clk_rate_exclusive_put(dsi->mod_clk);
return 0;
}
@@ -1198,7 +1205,8 @@ static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev)
}
reset_control_deassert(dsi->reset);
- clk_prepare_enable(dsi->mod_clk);
+ if (dsi->variant->has_mod_clk)
+ clk_prepare_enable(dsi->mod_clk);
/*
* Enable the DSI block.
@@ -1226,7 +1234,8 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev)
{
struct sun6i_dsi *dsi = dev_get_drvdata(dev);
- clk_disable_unprepare(dsi->mod_clk);
+ if (dsi->variant->has_mod_clk)
+ clk_disable_unprepare(dsi->mod_clk);
reset_control_assert(dsi->reset);
regulator_disable(dsi->regulator);
@@ -1239,9 +1248,16 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = {
NULL)
};
+static const struct sun6i_dsi_variant sun6i_a31_mipi_dsi = {
+ .has_mod_clk = true,
+};
+
static const struct of_device_id sun6i_dsi_of_table[] = {
- { .compatible = "allwinner,sun6i-a31-mipi-dsi" },
- { }
+ {
+ .compatible = "allwinner,sun6i-a31-mipi-dsi",
+ .data = &sun6i_a31_mipi_dsi,
+ },
+ { /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
index 06cce0d0d3ad..3c532e83958d 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
@@ -22,6 +22,10 @@ struct sun6i_dphy {
struct reset_control *reset;
};
+struct sun6i_dsi_variant {
+ bool has_mod_clk;
+};
+
struct sun6i_dsi {
struct drm_connector connector;
struct drm_encoder encoder;
@@ -39,6 +43,7 @@ struct sun6i_dsi {
struct sun4i_tcon *tcon;
struct mipi_dsi_device *device;
struct drm_panel *panel;
+ const struct sun6i_dsi_variant *variant;
};
static inline struct sun6i_dsi *host_to_sun6i_dsi(struct mipi_dsi_host *host)
--
2.18.0.321.gffc6fa0e3
next prev parent reply other threads:[~2019-02-01 15:44 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-01 15:42 [PATCH v7 00/23] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2019-02-01 15:42 ` [PATCH v7 01/23] drm/sun4i: sun6i_mipi_dsi: Compute burst mode loop N1 instruction delay Jagan Teki
2019-02-01 15:42 ` [PATCH v7 02/23] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection Jagan Teki
2019-02-01 15:42 ` [PATCH v7 03/23] drm/sun4i: sun6i_mipi_dsi: Setup burst mode timings Jagan Teki
2019-02-01 15:42 ` [PATCH v7 04/23] drm/sun4i: sun6i_mipi_dsi: Simplify drq to support all modes Jagan Teki
2019-02-01 15:42 ` [PATCH v7 05/23] drm/sun4i: tcon: Export get tcon0 routine Jagan Teki
2019-02-01 15:42 ` [PATCH v7 06/23] drm/sun4i: sun6i_mipi_dsi: Probe tcon0 during dsi_bind Jagan Teki
2019-02-01 15:42 ` [PATCH v7 07/23] drm/sun4i: sun6i_mipi_dsi: Setup burst mode Jagan Teki
2019-02-01 15:42 ` [PATCH v7 08/23] drm/sun4i: sun6i_mipi_dsi: Enable trail_inv and trail_fill controls Jagan Teki
2019-02-01 15:42 ` [PATCH v7 09/23] drm/sun4i: sun6i_mipi_dsi: Enable HBP, HSA_HSE for burst mode Jagan Teki
2019-02-01 15:42 ` [PATCH v7 10/23] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes Jagan Teki
2019-02-01 15:42 ` [PATCH v7 11/23] dt-bindings: sun6i-dsi: Add VCC-DSI supply property Jagan Teki
2019-02-01 15:42 ` [PATCH v7 12/23] drm/sun4i: sun6i_mipi_dsi: Add support for VCC-DSI voltage regulator Jagan Teki
2019-02-01 15:42 ` [PATCH v7 13/23] dt-bindings: sun6i-dsi: Add A64 MIPI-DSI compatible Jagan Teki
2019-02-01 15:42 ` [PATCH v7 14/23] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) Jagan Teki
2019-02-01 15:42 ` Jagan Teki [this message]
2019-02-01 15:42 ` [PATCH v7 16/23] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
2019-02-01 15:42 ` [PATCH v7 17/23] arm64: dts: allwinner: a64: Add MIPI DSI pipeline Jagan Teki
2019-02-01 15:42 ` [DO NOT MERGE][PATCH v7 18/23] arm64: allwinner: a64: pine64-lts: Enable Feiyang FY07024DI26A30-D DSI panel Jagan Teki
2019-02-01 15:42 ` [PATCH v7 19/23] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2019-02-01 15:42 ` [DO NOT MERGE][PATCH v7 20/23] arm64: dts: allwinner: bananapi-m64: Bananapi S070WV20-CT16 DSI panel Jagan Teki
2019-02-01 15:42 ` [PATCH v7 21/23] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value Jagan Teki
2019-02-01 15:42 ` [PATCH v7 22/23] drm/sun4i: sun6i_mipi_dsi: Fix DSI hfp " Jagan Teki
2019-02-01 15:42 ` [PATCH v7 23/23] arm64: dts: allwinner: a64-amarula-relic: Add Techstar TS8550B MIPI-DSI panel Jagan Teki
2019-02-01 15:48 ` [PATCH v7 00/23] drm/sun4i: Allwinner A64 MIPI-DSI support Maxime Ripard
2019-02-01 15:51 ` Jagan Teki
2019-02-12 9:46 ` Jagan Teki
2019-02-13 9:03 ` Maxime Ripard
2019-02-13 9:19 ` Jagan Teki
2019-02-14 16:41 ` Jagan Teki
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