[PATCH] clk: meson: fix pll settings calculation with arm32

From: Jerome Brunet <jbrunet@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH] clk: meson: fix pll settings calculation with arm32
Date: Sun,  3 Feb 2019 11:47:16 +0100	[thread overview]
Message-ID: <20190203104716.10479-1-jbrunet@baylibre.com> (raw)

fix undefined reference to `__aeabi_uldivmod' when dividing
u64 on arm32.

Fixes: 496c0462b46f ("clk: meson: pll: update driver for the g12a")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---

 Neil,

 Feel free to squash this with the offending change. If you prefer,
 I can submit a v7.

 Cheers
 Jerome

 drivers/clk/meson/clk-pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 7946d21a4ff4..41e16dd7272a 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -151,7 +151,7 @@ static unsigned int meson_clk_get_pll_range_m(unsigned long rate,
 	if (__pll_round_closest_mult(pll))
 		return DIV_ROUND_CLOSEST_ULL(val, parent_rate);
 
-	return val / parent_rate;
+	return div_u64(val,  parent_rate);
 }
 
 static int meson_clk_get_pll_range_index(unsigned long rate,
-- 
2.20.1

