From: Jordan Crouse <jcrouse@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, Stephen Boyd <swboyd@chromium.org>,
Colin Ian King <colin.king@canonical.com>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Sharat Masetty <smasetty@codeaurora.org>,
Andy Gross <andy.gross@linaro.org>,
Rob Clark <robdclark@gmail.com>, David Airlie <airlied@linux.ie>,
Mamta Shukla <mamtashukla555@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>
Subject: [PATCH v1 1/6] drm/msm/a6xx: Remove unwanted regulator code
Date: Mon, 4 Feb 2019 09:15:39 -0700 [thread overview]
Message-ID: <1549296944-17285-2-git-send-email-jcrouse@codeaurora.org> (raw)
In-Reply-To: <1549296944-17285-1-git-send-email-jcrouse@codeaurora.org>
The GMU code currently has some misguided code to try to work around
a hardware quirk that requires the power domains on the GPU be
collapsed in a certain order. Upcoming patches will do this the
right way so get rid of the unused and unwanted regulator
code.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 4 ----
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 2 --
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index ce1b3cc..f1baf64f 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -671,9 +671,6 @@ int a6xx_gmu_reset(struct a6xx_gpu *a6xx_gpu)
gmu_poll_timeout(gmu, REG_A6XX_RSCC_TCS3_DRV0_STATUS, val,
(val & 1), 100, 1000);
- /* Force off the GX GSDC */
- regulator_force_disable(gmu->gx);
-
/* Disable the resources */
clk_bulk_disable_unprepare(gmu->nr_clocks, gmu->clocks);
pm_runtime_put_sync(gmu->dev);
@@ -1203,7 +1200,6 @@ int a6xx_gmu_probe(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
gmu->idle_level = GMU_IDLE_STATE_ACTIVE;
pm_runtime_enable(gmu->dev);
- gmu->gx = devm_regulator_get(gmu->dev, "vdd");
/* Get the list of clocks */
ret = a6xx_gmu_clocks_probe(gmu);
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h
index c721d91..8081083 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h
@@ -52,8 +52,6 @@ struct a6xx_gmu {
int hfi_irq;
int gmu_irq;
- struct regulator *gx;
-
struct iommu_domain *domain;
u64 uncached_iova_base;
--
2.7.4
next prev parent reply other threads:[~2019-02-04 16:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-04 16:15 [PATCH v1 0/6] drm/msm: Improved a6xx GMU reset Jordan Crouse
2019-02-04 16:15 ` Jordan Crouse [this message]
2019-02-04 16:15 ` [PATCH v1 2/6] dt-bindings: drm/msm/a6xx: Add GX power-domain for GMU bindings Jordan Crouse
2019-02-17 21:08 ` Rob Herring
2019-02-17 22:43 ` Rob Clark
2019-02-19 16:12 ` Jordan Crouse
2019-02-04 16:15 ` [PATCH v1 3/6] drm/msm/gpu: Attach to the GPU GX power domain Jordan Crouse
2019-02-04 16:15 ` [PATCH v1 4/6] drm/msm/a6xx: Make GMU reset useful Jordan Crouse
2019-02-04 16:15 ` [PATCH v1 5/6] msm/drm/a6xx: Turn off the GMU if resume fails Jordan Crouse
2019-02-04 16:15 ` [PATCH v1 6/6] drm/msm/a6xx: Remove an unused struct member Jordan Crouse
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