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From: tip-bot for Kan Liang <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: peterz@infradead.org, mingo@kernel.org,
	torvalds@linux-foundation.org, dsahern@gmail.com,
	jolsa@redhat.com, kan.liang@linux.intel.com, acme@redhat.com,
	eranian@google.com, vincent.weaver@maine.edu,
	namhyung@kernel.org, hpa@zytor.com, linux-kernel@vger.kernel.org,
	tglx@linutronix.de, alexander.shishkin@linux.intel.com
Subject: [tip:perf/core] perf/x86/intel: Add counter freezing quirk for Goldmont
Date: Mon, 11 Feb 2019 02:46:42 -0800	[thread overview]
Message-ID: <tip-af63147c1edacfb75a28885a7cd7e6f44e626164@git.kernel.org> (raw)
In-Reply-To: <1549319013-4522-5-git-send-email-kan.liang@linux.intel.com>

Commit-ID:  af63147c1edacfb75a28885a7cd7e6f44e626164
Gitweb:     https://git.kernel.org/tip/af63147c1edacfb75a28885a7cd7e6f44e626164
Author:     Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Mon, 4 Feb 2019 14:23:33 -0800
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 11 Feb 2019 08:00:42 +0100

perf/x86/intel: Add counter freezing quirk for Goldmont

A microcode patch is also needed for Goldmont while counter freezing
feature is enabled. Otherwise, there will be some issues, e.g. PMI lost.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: bp@alien8.de
Link: https://lkml.kernel.org/r/1549319013-4522-5-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/events/intel/core.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index c79c0165d838..024a515d9102 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3924,8 +3924,12 @@ static __init void intel_nehalem_quirk(void)
 }
 
 static const struct x86_cpu_desc counter_freezing_ucodes[] = {
-	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	1, 0x00000028),
-	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	8, 0x00000006),
+	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT,	 2, 0x0000000e),
+	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT,	 9, 0x0000002e),
+	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT,	10, 0x00000008),
+	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_X,	 1, 0x00000028),
+	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	 1, 0x00000028),
+	INTEL_CPU_DESC(INTEL_FAM6_ATOM_GOLDMONT_PLUS,	 8, 0x00000006),
 	{}
 };
 
@@ -4295,6 +4299,7 @@ __init int intel_pmu_init(void)
 
 	case INTEL_FAM6_ATOM_GOLDMONT:
 	case INTEL_FAM6_ATOM_GOLDMONT_X:
+		x86_add_quirk(intel_counter_freezing_quirk);
 		memcpy(hw_cache_event_ids, glm_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs,

  reply	other threads:[~2019-02-11 10:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-04 22:23 [PATCH V7 1/5] x86/cpufeature: Add facility to check for min microcode revisions kan.liang
2019-02-04 22:23 ` [PATCH V7 2/5] perf/x86/kvm: Avoid unnecessary work in guest filtering kan.liang
2019-02-11 10:44   ` [tip:perf/core] " tip-bot for Andi Kleen
2019-02-04 22:23 ` [PATCH V7 3/5] perf/x86/intel: Clean up SNB pebs quirk kan.liang
2019-02-11 10:45   ` [tip:perf/core] perf/x86/intel: Clean up SNB PEBS quirk tip-bot for Kan Liang
2019-02-04 22:23 ` [PATCH V7 4/5] perf/x86/intel: Clean up counter freezing quirk kan.liang
2019-02-11 10:45   ` [tip:perf/core] " tip-bot for Kan Liang
2019-02-04 22:23 ` [PATCH V7 5/5] perf/x86/intel: Add counter freezing quirk for Goldmont kan.liang
2019-02-11 10:46   ` tip-bot for Kan Liang [this message]
2019-02-05 11:46 ` [PATCH V7 1/5] x86/cpufeature: Add facility to check for min microcode revisions Peter Zijlstra
2019-02-05 12:26   ` Borislav Petkov
2019-02-11 10:43 ` [tip:perf/core] " tip-bot for Kan Liang

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