From: "Ji-Ze Hong (Peter Hong)" <hpeter@gmail.com>
To: wim@linux-watchdog.orgw, linux@roeck-us.net
Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org,
"Ji-Ze Hong (Peter Hong)" <hpeter+linux_kernel@gmail.com>
Subject: [PATCH V1 1/1] watchdog: f71808e_wdt: fix F81866 bit operation
Date: Fri, 22 Mar 2019 11:36:56 +0800 [thread overview]
Message-ID: <1553225816-24375-1-git-send-email-hpeter+linux_kernel@gmail.com> (raw)
Fix error bit operation in watchdog_start()
Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
---
drivers/watchdog/f71808e_wdt.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 9a1c761258ce..9129485732c7 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -387,18 +387,17 @@ static int watchdog_start(void)
case f81866:
/* Set pin 70 to WDTRST# */
- superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
- BIT(3) | BIT(0));
- superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
- BIT(2));
+ superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, 3);
+ superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, 0);
+ superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, 2);
+
/*
* GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
* The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
* BIT5: 0 -> WDTRST#
* 1 -> GPIO15
*/
- superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1,
- BIT(5));
+ superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5);
break;
default:
--
2.7.4
next reply other threads:[~2019-03-22 3:37 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-22 3:36 Ji-Ze Hong (Peter Hong) [this message]
2019-03-22 5:18 ` [PATCH V1 1/1] watchdog: f71808e_wdt: fix F81866 bit operation Greg KH
2019-03-22 13:06 ` Guenter Roeck
2019-03-25 6:10 ` Ji-Ze Hong (Peter Hong)
2019-03-25 10:29 ` Guenter Roeck
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