From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
Murali Karicheri <m-karicheri2@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-arm-kernel@axis.com>,
Minghuan Lian <minghuan.Lian@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
Jesper Nilsson <jesper.nilsson@axis.com>
Subject: [PATCH v3 21/26] PCI: dwc: Add callbacks for accessing dbi2 address space
Date: Mon, 25 Mar 2019 15:09:42 +0530 [thread overview]
Message-ID: <20190325093947.32633-22-kishon@ti.com> (raw)
In-Reply-To: <20190325093947.32633-1-kishon@ti.com>
Certain platforms like TI's AM654 doesn't have separate address space for
dbi2 instead they are accessed using the same address space as dbi
with some configuration bit set. In order to support such platforms,
add callbacks for accessing dbi2 address space.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 31 ++++++++++++++++++++
drivers/pci/controller/dwc/pcie-designware.h | 12 ++++++--
2 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 4e2f7946da89..d7cc1a0c1de6 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -89,6 +89,37 @@ void __dw_pcie_write_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg,
dev_err(pci->dev, "Write DBI address failed\n");
}
+u32 __dw_pcie_read_dbi2(struct dw_pcie *pci, void __iomem *base, u32 reg,
+ size_t size)
+{
+ int ret;
+ u32 val;
+
+ if (pci->ops->read_dbi2)
+ return pci->ops->read_dbi2(pci, base, reg, size);
+
+ ret = dw_pcie_read(base + reg, size, &val);
+ if (ret)
+ dev_err(pci->dev, "read DBI address failed\n");
+
+ return val;
+}
+
+void __dw_pcie_write_dbi2(struct dw_pcie *pci, void __iomem *base, u32 reg,
+ size_t size, u32 val)
+{
+ int ret;
+
+ if (pci->ops->write_dbi2) {
+ pci->ops->write_dbi2(pci, base, reg, size, val);
+ return;
+ }
+
+ ret = dw_pcie_write(base + reg, size, val);
+ if (ret)
+ dev_err(pci->dev, "write DBI address failed\n");
+}
+
static u32 dw_pcie_readl_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg)
{
u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index e36941ff7cf6..7abca9eb00bf 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -218,6 +218,10 @@ struct dw_pcie_ops {
size_t size);
void (*write_dbi)(struct dw_pcie *pcie, void __iomem *base, u32 reg,
size_t size, u32 val);
+ u32 (*read_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg,
+ size_t size);
+ void (*write_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg,
+ size_t size, u32 val);
int (*link_up)(struct dw_pcie *pcie);
int (*start_link)(struct dw_pcie *pcie);
void (*stop_link)(struct dw_pcie *pcie);
@@ -249,6 +253,10 @@ u32 __dw_pcie_read_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg,
size_t size);
void __dw_pcie_write_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg,
size_t size, u32 val);
+u32 __dw_pcie_read_dbi2(struct dw_pcie *pci, void __iomem *base, u32 reg,
+ size_t size);
+void __dw_pcie_write_dbi2(struct dw_pcie *pci, void __iomem *base, u32 reg,
+ size_t size, u32 val);
int dw_pcie_link_up(struct dw_pcie *pci);
int dw_pcie_wait_for_link(struct dw_pcie *pci);
void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
@@ -292,12 +300,12 @@ static inline u8 dw_pcie_readb_dbi(struct dw_pcie *pci, u32 reg)
static inline void dw_pcie_writel_dbi2(struct dw_pcie *pci, u32 reg, u32 val)
{
- __dw_pcie_write_dbi(pci, pci->dbi_base2, reg, 0x4, val);
+ __dw_pcie_write_dbi2(pci, pci->dbi_base2, reg, 0x4, val);
}
static inline u32 dw_pcie_readl_dbi2(struct dw_pcie *pci, u32 reg)
{
- return __dw_pcie_read_dbi(pci, pci->dbi_base2, reg, 0x4);
+ return __dw_pcie_read_dbi2(pci, pci->dbi_base2, reg, 0x4);
}
static inline void dw_pcie_writel_atu(struct dw_pcie *pci, u32 reg, u32 val)
--
2.17.1
next prev parent reply other threads:[~2019-03-25 9:44 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-25 9:39 [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 01/26] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 02/26] PCI: keystone: Cleanup error_irq configuration Kishon Vijay Abraham I
2019-04-13 14:03 ` Bjorn Helgaas
2019-04-15 5:28 ` Kishon Vijay Abraham I
2019-04-13 14:07 ` Bjorn Helgaas
2019-03-25 9:39 ` [PATCH v3 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 04/26] PCI: keystone: Perform host initialization in a single function Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 05/26] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 06/26] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 07/26] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 08/26] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 09/26] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 10/26] PCI: dwc: Enable iATU unroll for endpoint too Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 11/26] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 12/26] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2019-04-11 15:03 ` Lorenzo Pieralisi
2019-04-12 8:50 ` Kishon Vijay Abraham I
2019-04-12 9:31 ` Russell King - ARM Linux admin
2019-04-12 11:02 ` Kishon Vijay Abraham I
2019-04-12 11:11 ` Lorenzo Pieralisi
2019-04-12 11:29 ` Kishon Vijay Abraham I
2019-04-12 11:48 ` Lorenzo Pieralisi
2019-03-25 9:39 ` [PATCH v3 13/26] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 14/26] PCI: keystone: Add support for PCIe RC in AM654x Platforms Kishon Vijay Abraham I
2019-04-13 15:26 ` Bjorn Helgaas
2019-04-16 14:15 ` Lorenzo Pieralisi
2019-04-17 13:06 ` Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 15/26] PCI: keystone: Invoke phy_reset API before enabling PHY Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 16/26] PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers Kishon Vijay Abraham I
2019-04-11 15:00 ` Lorenzo Pieralisi
2019-04-12 14:05 ` Bjorn Helgaas
2019-03-25 9:39 ` [PATCH v3 17/26] PCI: keystone: Add support to set the max link speed from DT Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 18/26] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Kishon Vijay Abraham I
2019-04-11 15:32 ` Lorenzo Pieralisi
2019-04-12 10:37 ` Kishon Vijay Abraham I
2019-04-12 10:55 ` Lorenzo Pieralisi
2019-03-25 9:39 ` [PATCH v3 19/26] PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 20/26] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Kishon Vijay Abraham I
2019-04-13 15:44 ` Bjorn Helgaas
2019-04-16 14:11 ` Lorenzo Pieralisi
2019-03-25 9:39 ` Kishon Vijay Abraham I [this message]
2019-03-25 9:39 ` [PATCH v3 22/26] PCI: keystone: Add support for PCIe EP in AM654x Platforms Kishon Vijay Abraham I
2019-04-26 9:40 ` Lorenzo Pieralisi
2019-04-26 12:41 ` Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 23/26] PCI: designware-ep: Configure RESBAR to advertise the smallest size Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 24/26] PCI: designware-ep: Use aligned ATU window for raising MSI interrupts Kishon Vijay Abraham I
2019-04-13 15:58 ` Bjorn Helgaas
2019-03-25 9:39 ` [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Kishon Vijay Abraham I
2019-03-25 9:39 ` [PATCH v3 26/26] misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test Kishon Vijay Abraham I
2019-04-12 15:48 ` [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Lorenzo Pieralisi
2019-04-13 16:04 ` Bjorn Helgaas
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