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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: alexander.shishkin@linux.intel.com, peterz@infradead.org,
	suzuki.poulose@arm.com, mike.leach@arm.com, leo.yan@linaro.org,
	coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 12/20] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf()
Date: Wed,  3 Apr 2019 21:35:33 -0600	[thread overview]
Message-ID: <20190404033541.14072-13-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20190404033541.14072-1-mathieu.poirier@linaro.org>

Refactoring function tmc_etr_setup_perf_buf() so that it only deals
with the high level etr_perf_buffer, leaving the allocation of the
backend buffer (i.e etr_buf) to another function.

That way the backend buffer allocation function can decide if it wants
to reuse an existing buffer (CPU-wide trace scenarios) or simply create
a new one.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 .../hwtracing/coresight/coresight-tmc-etr.c   | 39 ++++++++++++++-----
 1 file changed, 30 insertions(+), 9 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 00db6a6ce23f..e9c77009188a 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1159,29 +1159,24 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
 }
 
 /*
- * tmc_etr_setup_perf_buf: Allocate ETR buffer for use by perf.
+ * alloc_etr_buf: Allocate ETR buffer for use by perf.
  * The size of the hardware buffer is dependent on the size configured
  * via sysfs and the perf ring buffer size. We prefer to allocate the
  * largest possible size, scaling down the size by half until it
  * reaches a minimum limit (1M), beyond which we give up.
  */
-static struct etr_perf_buffer *
-tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
-		       int nr_pages, void **pages, bool snapshot)
+static struct etr_buf *
+alloc_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
+	      int nr_pages, void **pages, bool snapshot)
 {
 	int node, cpu = event->cpu;
 	struct etr_buf *etr_buf;
-	struct etr_perf_buffer *etr_perf;
 	unsigned long size;
 
 	if (cpu == -1)
 		cpu = smp_processor_id();
 	node = cpu_to_node(cpu);
 
-	etr_perf = kzalloc_node(sizeof(*etr_perf), GFP_KERNEL, node);
-	if (!etr_perf)
-		return ERR_PTR(-ENOMEM);
-
 	/*
 	 * Try to match the perf ring buffer size if it is larger
 	 * than the size requested via sysfs.
@@ -1205,6 +1200,32 @@ tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
 		size /= 2;
 	} while (size >= TMC_ETR_PERF_MIN_BUF_SIZE);
 
+	return ERR_PTR(-ENOMEM);
+
+done:
+	return etr_buf;
+}
+
+static struct etr_perf_buffer *
+tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
+		       int nr_pages, void **pages, bool snapshot)
+{
+	int node, cpu = event->cpu;
+	struct etr_buf *etr_buf;
+	struct etr_perf_buffer *etr_perf;
+
+	if (cpu == -1)
+		cpu = smp_processor_id();
+	node = cpu_to_node(cpu);
+
+	etr_perf = kzalloc_node(sizeof(*etr_perf), GFP_KERNEL, node);
+	if (!etr_perf)
+		return ERR_PTR(-ENOMEM);
+
+	etr_buf = alloc_etr_buf(drvdata, event, nr_pages, pages, snapshot);
+	if (!IS_ERR(etr_buf))
+		goto done;
+
 	kfree(etr_perf);
 	return ERR_PTR(-ENOMEM);
 
-- 
2.17.1


  parent reply	other threads:[~2019-04-04  3:36 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04  3:35 [PATCH v3 00/20] coresight: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 01/20] coresight: pmu: Adding ITRACE property to cs_etm PMU Mathieu Poirier
2019-04-04  8:48   ` Suzuki K Poulose
2019-04-04  3:35 ` [PATCH v3 02/20] coresight: etm4x: Add kernel configuration for CONTEXTID Mathieu Poirier
2019-04-04  8:53   ` Suzuki K Poulose
2019-04-04  3:35 ` [PATCH v3 03/20] coresight: etm4x: Skip selector pair 0 Mathieu Poirier
2019-04-04  8:50   ` Suzuki K Poulose
2019-04-04  3:35 ` [PATCH v3 04/20] coresight: etm4x: Configure tracers to emit timestamps Mathieu Poirier
2019-04-04  4:47   ` Mike Leach
2019-04-04  3:35 ` [PATCH v3 05/20] coresight: Adding return code to sink::disable() operation Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 06/20] coresight: Move reference counting inside sink drivers Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 07/20] coresight: Properly address errors in sink::disable() functions Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 08/20] coresight: Properly address concurrency in sink::update() functions Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 09/20] coresight: perf: Clean up function etm_setup_aux() Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 10/20] coresight: perf: Refactor function free_event_data() Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 11/20] coresight: Communicate perf event to sink buffer allocation functions Mathieu Poirier
2019-04-04  3:35 ` Mathieu Poirier [this message]
2019-04-04  3:35 ` [PATCH v3 13/20] coresight: tmc-etr: Create per-thread buffer allocation function Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 14/20] coresight: tmc-etr: Introduce the notion of process ID to ETR devices Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 15/20] coresight: tmc-etr: Introduce the notion of reference counting " Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 16/20] coresight: tmc-etr: Introduce the notion of IDR " Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 17/20] coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 18/20] coresight: tmc-etr: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 19/20] coresight: tmc-etf: " Mathieu Poirier
2019-04-04  3:35 ` [PATCH v3 20/20] coresight: etb10: " Mathieu Poirier

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