From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: alexander.shishkin@linux.intel.com, peterz@infradead.org,
suzuki.poulose@arm.com, mike.leach@arm.com, leo.yan@linaro.org,
coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 13/20] coresight: tmc-etr: Create per-thread buffer allocation function
Date: Wed, 3 Apr 2019 21:35:34 -0600 [thread overview]
Message-ID: <20190404033541.14072-14-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20190404033541.14072-1-mathieu.poirier@linaro.org>
Buffer allocation is different when dealing with per-thread and
CPU-wide sessions. In preparation to support CPU-wide trace scenarios
simplify things by keeping allocation functions for both type separate.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
.../hwtracing/coresight/coresight-tmc-etr.c | 29 ++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index e9c77009188a..ac1efdfc0d07 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1206,6 +1206,33 @@ alloc_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
return etr_buf;
}
+static struct etr_buf *
+get_perf_etr_buf_per_thread(struct tmc_drvdata *drvdata,
+ struct perf_event *event, int nr_pages,
+ void **pages, bool snapshot)
+{
+ struct etr_buf *etr_buf;
+
+ /*
+ * In per-thread mode the etr_buf isn't shared, so just go ahead
+ * with memory allocation.
+ */
+ etr_buf = alloc_etr_buf(drvdata, event, nr_pages, pages, snapshot);
+
+ return etr_buf;
+}
+
+static struct etr_buf *
+get_perf_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
+ int nr_pages, void **pages, bool snapshot)
+{
+ if (event->cpu == -1)
+ return get_perf_etr_buf_per_thread(drvdata, event, nr_pages,
+ pages, snapshot);
+
+ return ERR_PTR(-ENOENT);
+}
+
static struct etr_perf_buffer *
tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
int nr_pages, void **pages, bool snapshot)
@@ -1222,7 +1249,7 @@ tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event,
if (!etr_perf)
return ERR_PTR(-ENOMEM);
- etr_buf = alloc_etr_buf(drvdata, event, nr_pages, pages, snapshot);
+ etr_buf = get_perf_etr_buf(drvdata, event, nr_pages, pages, snapshot);
if (!IS_ERR(etr_buf))
goto done;
--
2.17.1
next prev parent reply other threads:[~2019-04-04 3:36 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-04 3:35 [PATCH v3 00/20] coresight: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 01/20] coresight: pmu: Adding ITRACE property to cs_etm PMU Mathieu Poirier
2019-04-04 8:48 ` Suzuki K Poulose
2019-04-04 3:35 ` [PATCH v3 02/20] coresight: etm4x: Add kernel configuration for CONTEXTID Mathieu Poirier
2019-04-04 8:53 ` Suzuki K Poulose
2019-04-04 3:35 ` [PATCH v3 03/20] coresight: etm4x: Skip selector pair 0 Mathieu Poirier
2019-04-04 8:50 ` Suzuki K Poulose
2019-04-04 3:35 ` [PATCH v3 04/20] coresight: etm4x: Configure tracers to emit timestamps Mathieu Poirier
2019-04-04 4:47 ` Mike Leach
2019-04-04 3:35 ` [PATCH v3 05/20] coresight: Adding return code to sink::disable() operation Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 06/20] coresight: Move reference counting inside sink drivers Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 07/20] coresight: Properly address errors in sink::disable() functions Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 08/20] coresight: Properly address concurrency in sink::update() functions Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 09/20] coresight: perf: Clean up function etm_setup_aux() Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 10/20] coresight: perf: Refactor function free_event_data() Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 11/20] coresight: Communicate perf event to sink buffer allocation functions Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 12/20] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf() Mathieu Poirier
2019-04-04 3:35 ` Mathieu Poirier [this message]
2019-04-04 3:35 ` [PATCH v3 14/20] coresight: tmc-etr: Introduce the notion of process ID to ETR devices Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 15/20] coresight: tmc-etr: Introduce the notion of reference counting " Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 16/20] coresight: tmc-etr: Introduce the notion of IDR " Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 17/20] coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 18/20] coresight: tmc-etr: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 19/20] coresight: tmc-etf: " Mathieu Poirier
2019-04-04 3:35 ` [PATCH v3 20/20] coresight: etb10: " Mathieu Poirier
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