From: Anson Huang <anson.huang@nxp.com>
To: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"festevam@gmail.com" <festevam@gmail.com>,
"a.zummo@towertech.it" <a.zummo@towertech.it>,
"alexandre.belloni@bootlin.com" <alexandre.belloni@bootlin.com>,
Aisheng Dong <aisheng.dong@nxp.com>,
"ulf.hansson@linaro.org" <ulf.hansson@linaro.org>,
"sboyd@kernel.org" <sboyd@kernel.org>,
Peng Fan <peng.fan@nxp.com>,
Daniel Baluta <daniel.baluta@nxp.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-rtc@vger.kernel.org" <linux-rtc@vger.kernel.org>
Cc: dl-linux-imx <linux-imx@nxp.com>
Subject: [PATCH V6 3/4] arm64: dts: freescale: imx8qxp: enable scu general irq channel
Date: Tue, 9 Apr 2019 02:43:23 +0000 [thread overview]
Message-ID: <1554777487-31075-3-git-send-email-Anson.Huang@nxp.com> (raw)
In-Reply-To: <1554777487-31075-1-git-send-email-Anson.Huang@nxp.com>
On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify
user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox
RX doorbell mode is used for this function, this patch adds
support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 0cb9398..70ef3db 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -21,6 +21,7 @@
mmc1 = &usdhc2;
mmc2 = &usdhc3;
serial0 = &adma_lpuart0;
+ mu1 = &lsio_mu1;
};
cpus {
@@ -117,7 +118,8 @@
scu {
compatible = "fsl,imx-scu";
mbox-names = "tx0", "tx1", "tx2", "tx3",
- "rx0", "rx1", "rx2", "rx3";
+ "rx0", "rx1", "rx2", "rx3",
+ "gip3";
mboxes = <&lsio_mu1 0 0
&lsio_mu1 0 1
&lsio_mu1 0 2
@@ -125,7 +127,8 @@
&lsio_mu1 1 0
&lsio_mu1 1 1
&lsio_mu1 1 2
- &lsio_mu1 1 3>;
+ &lsio_mu1 1 3
+ &lsio_mu1 3 3>;
clk: clock-controller {
compatible = "fsl,imx8qxp-clk";
--
2.7.4
next prev parent reply other threads:[~2019-04-09 2:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-09 2:43 [PATCH V6 1/4] dt-bindings: fsl: scu: add general interrupt support Anson Huang
2019-04-09 2:43 ` [PATCH V6 2/4] firmware: imx: enable imx scu general irq function Anson Huang
2019-04-09 3:20 ` Aisheng Dong
2019-04-09 3:34 ` Anson Huang
2019-04-09 2:43 ` Anson Huang [this message]
2019-04-09 2:43 ` [PATCH V6 4/4] rtc: imx-sc: add rtc alarm support Anson Huang
2019-04-09 3:25 ` Aisheng Dong
2019-04-09 3:33 ` Anson Huang
2019-04-09 3:35 ` Aisheng Dong
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