From: Daniel Drake <drake@endlessm.com>
To: tglx@linutronix.de, lenb@kernel.org
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux@endlessm.com,
rjw@rjwysocki.net
Subject: Detecting x86 LAPIC timer frequency from CPUID data
Date: Wed, 17 Apr 2019 13:28:10 +0800 [thread overview]
Message-ID: <20190417052810.3052-1-drake@endlessm.com> (raw)
The CPUID.0x16 leaf provides "Bus (Reference) Frequency (in MHz)".
In the thread "No 8254 PIT & no HPET on new Intel N3350 platforms
causes kernel panic during early boot" we are exploring ways to have
the kernel avoid using the PIT/HPET IRQ0 timer in more cases, and
Thomas Gleixner suggested that we could use this CPUID data to set
lapic_timer_frequency, avoiding the need for calibrate_APIC_clock()
to measure the APIC clock against the IRQ0 timer.
I'm thinking of the the following code change, however I get
unexpected results on Intel i7-8565U (Whiskey Lake). When
booting without this change, and with apic=notscdeadline (so that
APIC clock gets calibrated and used), the bus speed is detected as
23MHz:
... lapic delta = 149994
... PM-Timer delta = 357939
... PM-Timer result ok
..... delta 149994
..... mult: 6442193
..... calibration result: 23999
..... CPU clock speed is 1991.0916 MHz.
..... host bus clock speed is 23.0999 MHz.
However the CPUID.0x16 ECX reports a 100MHz bus speed on this device,
so this code change would produce a significantly different calibration.
Am I doing anything obviously wrong?
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 3fae23834069..6c51ce842f86 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -679,6 +679,16 @@ static unsigned long cpu_khz_from_cpuid(void)
cpuid(0x16, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
+#ifdef CONFIG_X86_LOCAL_APIC
+ /*
+ * If bus frequency is provided in CPUID data, set
+ * global lapic_timer_frequency to bus_clock_cycles/jiffy.
+ * This avoids having to calibrate the APIC timer later.
+ */
+ if (ecx_bus_mhz)
+ lapic_timer_frequency = (ecx_bus_mhz * 1000000) / HZ;
+#endif
+
return eax_base_mhz * 1000;
}
--
2.19.1
next reply other threads:[~2019-04-17 5:28 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-17 5:28 Daniel Drake [this message]
2019-04-18 13:12 ` Detecting x86 LAPIC timer frequency from CPUID data Thomas Gleixner
2019-04-18 22:30 ` Thomas Gleixner
2019-04-19 8:35 ` Daniel Drake
2019-04-19 8:57 ` Thomas Gleixner
2019-04-19 20:50 ` Jacob Pan
2019-04-19 20:52 ` Thomas Gleixner
2019-04-19 23:09 ` Jacob Pan
2019-05-09 10:34 ` [tip:x86/apic] x86/tsc: Use CPUID.0x16 to calculate missing crystal frequency tip-bot for Daniel Drake
-- strict thread matches above, loose matches on Subject: below --
2019-05-09 5:54 [PATCH v2 1/3] x86/tsc: use " Daniel Drake
2019-05-09 5:54 ` [PATCH v2 2/3] x86/apic: rename lapic_timer_frequency to lapic_timer_period Daniel Drake
2019-05-09 10:34 ` [tip:x86/apic] x86/apic: Rename 'lapic_timer_frequency' to 'lapic_timer_period' tip-bot for Daniel Drake
2019-05-09 5:54 ` [PATCH v2 3/3] x86/tsc: set LAPIC timer period to crystal clock frequency Daniel Drake
2019-05-09 7:25 ` [PATCH v2 1/3] x86/tsc: use CPUID.0x16 to calculate missing crystal frequency Thomas Gleixner
2019-05-09 9:07 ` Ingo Molnar
2019-04-03 7:49 No 8254 PIT & no HPET on new Intel N3350 platforms causes kernel panic during early boot Daniel Drake
2019-04-03 11:21 ` Thomas Gleixner
2019-04-03 12:01 ` Thomas Gleixner
2019-04-09 5:43 ` Daniel Drake
2019-04-10 12:54 ` Thomas Gleixner
2019-04-16 5:21 ` Daniel Drake
2019-05-09 10:35 ` [tip:x86/apic] x86/tsc: Set LAPIC timer period to crystal clock frequency tip-bot for Daniel Drake
2019-06-27 8:54 ` No 8254 PIT & no HPET on new Intel N3350 platforms causes kernel panic during early boot Daniel Drake
2019-06-27 14:06 ` Thomas Gleixner
2019-06-28 3:33 ` Daniel Drake
2019-06-28 5:07 ` Thomas Gleixner
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