From: Fenghua Yu <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
"Borislav Petkov" <bp@alien8.de>, "H Peter Anvin" <hpa@zytor.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Dave Hansen" <dave.hansen@intel.com>,
"Ashok Raj" <ashok.raj@intel.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Ravi V Shankar" <ravi.v.shankar@intel.com>,
"Xiaoyao Li " <xiaoyao.li@intel.com>,
"Christopherson Sean J" <sean.j.christopherson@intel.com>,
"Kalle Valo" <kvalo@codeaurora.org>,
"Michael Chan" <michael.chan@broadcom.com>
Cc: "linux-kernel" <linux-kernel@vger.kernel.org>,
"x86" <x86@kernel.org>,
kvm@vger.kernel.org, netdev@vger.kernel.org,
linux-wireless@vger.kernel.org, Fenghua Yu <fenghua.yu@intel.com>
Subject: [PATCH v8 02/15] drivers/net/b44: Align pwol_mask to unsigned long for better performance
Date: Wed, 24 Apr 2019 12:32:49 -0700 [thread overview]
Message-ID: <1556134382-58814-3-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1556134382-58814-1-git-send-email-fenghua.yu@intel.com>
From: Peter Zijlstra <peterz@infradead.org>
A bit in pwol_mask is set in b44_magic_pattern() by atomic set_bit().
But since pwol_mask is local and never exposed to concurrency, there is
no need to set bit in pwol_mask atomically.
set_bit() sets the bit in a single unsigned long location. Because
pwol_mask may not be aligned to unsigned long, the location may cross two
cache lines. On x86, accessing two cache lines in locked instruction in
set_bit() is called split locked access and can cause overall performance
degradation.
So use non atomic __set_bit() to set pwol_mask bits. __set_bit() won't hit
split lock issue on x86.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
drivers/net/ethernet/broadcom/b44.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/b44.c b/drivers/net/ethernet/broadcom/b44.c
index 97ab0dd25552..5738ab963dfb 100644
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -1520,7 +1520,7 @@ static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset)
memset(ppattern + offset, 0xff, magicsync);
for (j = 0; j < magicsync; j++)
- set_bit(len++, (unsigned long *) pmask);
+ __set_bit(len++, (unsigned long *)pmask);
for (j = 0; j < B44_MAX_PATTERNS; j++) {
if ((B44_PATTERN_SIZE - len) >= ETH_ALEN)
@@ -1532,7 +1532,7 @@ static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset)
for (k = 0; k< ethaddr_bytes; k++) {
ppattern[offset + magicsync +
(j * ETH_ALEN) + k] = macaddr[k];
- set_bit(len++, (unsigned long *) pmask);
+ __set_bit(len++, (unsigned long *)pmask);
}
}
return len - 1;
--
2.19.1
next prev parent reply other threads:[~2019-04-24 19:41 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-24 19:32 [PATCH v8 00/15] x86/split_lock: Enable split lock detection Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 01/15] x86/common: Align cpu_caps_cleared and cpu_caps_set to unsigned long Fenghua Yu
2019-04-24 19:32 ` Fenghua Yu [this message]
2019-04-24 19:32 ` [PATCH v8 03/15] wlcore: simplify/fix/optimize reg_ch_conf_pending operations Fenghua Yu
2019-04-25 17:12 ` Kalle Valo
2019-04-24 19:32 ` [PATCH v8 04/15] x86/split_lock: Align x86_capability to unsigned long to avoid split locked access Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 05/15] x86/msr-index: Define MSR_IA32_CORE_CAPABILITY and split lock detection bit Fenghua Yu
2019-04-25 5:45 ` Ingo Molnar
2019-04-25 19:01 ` Fenghua Yu
2019-04-25 19:47 ` Ingo Molnar
2019-04-25 19:51 ` Fenghua Yu
2019-04-25 20:08 ` Ingo Molnar
2019-04-25 20:22 ` Fenghua Yu
2019-04-26 6:00 ` Ingo Molnar
2019-05-06 0:12 ` Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 06/15] x86/cpufeatures: Enumerate MSR_IA32_CORE_CAPABILITY Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 07/15] x86/split_lock: Enumerate split lock detection by MSR_IA32_CORE_CAPABILITY Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 08/15] x86/split_lock: Enumerate split lock detection on Icelake mobile processor Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 09/15] x86/split_lock: Define MSR TEST_CTL register Fenghua Yu
2019-04-25 6:21 ` Ingo Molnar
2019-04-25 19:48 ` Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 10/15] x86/split_lock: Handle #AC exception for split lock Fenghua Yu
2019-04-25 6:07 ` Ingo Molnar
2019-04-25 7:29 ` Thomas Gleixner
2019-04-24 19:32 ` [PATCH v8 11/15] kvm/x86: Emulate MSR IA32_CORE_CAPABILITY Fenghua Yu
2019-04-24 19:32 ` [PATCH v8 12/15] kvm/vmx: Emulate MSR TEST_CTL Fenghua Yu
2019-04-25 7:42 ` Thomas Gleixner
2019-04-27 12:20 ` Xiaoyao Li
2019-04-28 7:09 ` Thomas Gleixner
2019-04-28 7:34 ` Xiaoyao Li
2019-04-29 7:31 ` Thomas Gleixner
2019-04-29 5:21 ` Xiaoyao Li
2019-04-24 19:33 ` [PATCH v8 13/15] x86/split_lock: Enable split lock detection by default Fenghua Yu
2019-04-25 7:50 ` Thomas Gleixner
2019-05-06 21:39 ` Fenghua Yu
2019-04-25 10:52 ` David Laight
2019-04-25 10:58 ` Thomas Gleixner
2019-04-25 11:13 ` David Laight
2019-04-25 11:41 ` Peter Zijlstra
2019-04-25 13:04 ` Thomas Gleixner
2019-05-07 20:48 ` Fenghua Yu
2019-04-24 19:33 ` [PATCH v8 14/15] x86/split_lock: Disable split lock detection by kernel parameter "nosplit_lock_detect" Fenghua Yu
2019-04-24 19:33 ` [PATCH v8 15/15] x86/split_lock: Add a sysfs interface to enable/disable split lock detection during run time Fenghua Yu
2019-04-25 6:31 ` Ingo Molnar
2019-05-06 0:21 ` Fenghua Yu
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