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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 30/32] coresight: tmc-etr: Add support for CPU-wide trace scenarios
Date: Thu, 25 Apr 2019 13:53:08 -0600	[thread overview]
Message-ID: <20190425195310.31562-31-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20190425195310.31562-1-mathieu.poirier@linaro.org>

This patch adds support for CPU-wide trace scenarios by making sure that
only the sources monitoring the same process have access to a common sink.
Because the sink is shared between sources, the first source to use the
sink switches it on while the last one does the cleanup.  Any attempt to
modify the HW is overlooked for as long as more than one source is using
a sink.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
---
 .../hwtracing/coresight/coresight-tmc-etr.c   | 38 ++++++++++++++++---
 drivers/hwtracing/coresight/coresight-tmc.c   |  2 +
 drivers/hwtracing/coresight/coresight-tmc.h   |  3 ++
 3 files changed, 38 insertions(+), 5 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 8c75800003d2..df6e4b0b84e9 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1474,6 +1474,13 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 	struct etr_buf *etr_buf = etr_perf->etr_buf;
 
 	spin_lock_irqsave(&drvdata->spinlock, flags);
+
+	/* Don't do anything if another tracer is using this sink */
+	if (atomic_read(csdev->refcnt) != 1) {
+		spin_unlock_irqrestore(&drvdata->spinlock, flags);
+		goto out;
+	}
+
 	if (WARN_ON(drvdata->perf_data != etr_perf)) {
 		lost = true;
 		spin_unlock_irqrestore(&drvdata->spinlock, flags);
@@ -1513,17 +1520,15 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
 {
 	int rc = 0;
+	pid_t pid;
 	unsigned long flags;
 	struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 	struct perf_output_handle *handle = data;
 	struct etr_perf_buffer *etr_perf = etm_perf_sink_config(handle);
 
 	spin_lock_irqsave(&drvdata->spinlock, flags);
-	/*
-	 * There can be only one writer per sink in perf mode. If the sink
-	 * is already open in SYSFS mode, we can't use it.
-	 */
-	if (drvdata->mode != CS_MODE_DISABLED || WARN_ON(drvdata->perf_data)) {
+	 /* Don't use this sink if it is already claimed by sysFS */
+	if (drvdata->mode == CS_MODE_SYSFS) {
 		rc = -EBUSY;
 		goto unlock_out;
 	}
@@ -1533,10 +1538,31 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
 		goto unlock_out;
 	}
 
+	/* Get a handle on the pid of the process to monitor */
+	pid = etr_perf->pid;
+
+	/* Do not proceed if this device is associated with another session */
+	if (drvdata->pid != -1 && drvdata->pid != pid) {
+		rc = -EBUSY;
+		goto unlock_out;
+	}
+
 	etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
 	drvdata->perf_data = etr_perf;
+
+	/*
+	 * No HW configuration is needed if the sink is already in
+	 * use for this session.
+	 */
+	if (drvdata->pid == pid) {
+		atomic_inc(csdev->refcnt);
+		goto unlock_out;
+	}
+
 	rc = tmc_etr_enable_hw(drvdata, etr_perf->etr_buf);
 	if (!rc) {
+		/* Associate with monitored process. */
+		drvdata->pid = pid;
 		drvdata->mode = CS_MODE_PERF;
 		atomic_inc(csdev->refcnt);
 	}
@@ -1580,6 +1606,8 @@ static int tmc_disable_etr_sink(struct coresight_device *csdev)
 	/* Complain if we (somehow) got out of sync */
 	WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED);
 	tmc_etr_disable_hw(drvdata);
+	/* Dissociate from monitored process. */
+	drvdata->pid = -1;
 	drvdata->mode = CS_MODE_DISABLED;
 
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 9f9b2c514566..3f718729d741 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -422,6 +422,8 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
 	devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
 	drvdata->config_type = BMVAL(devid, 6, 7);
 	drvdata->memwidth = tmc_get_memwidth(devid);
+	/* This device is not associated with a session */
+	drvdata->pid = -1;
 
 	if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 		if (np)
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index c1b1700b2df7..503f1b3a3741 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -165,6 +165,8 @@ struct etr_buf {
  * @csdev:	component vitals needed by the framework.
  * @miscdev:	specifics to handle "/dev/xyz.tmc" entry.
  * @spinlock:	only one at a time pls.
+ * @pid:	Process ID of the process being monitored by the session
+ *		that is using this component.
  * @buf:	Snapshot of the trace data for ETF/ETB.
  * @etr_buf:	details of buffer used in TMC-ETR
  * @len:	size of the available trace for ETF/ETB.
@@ -186,6 +188,7 @@ struct tmc_drvdata {
 	struct coresight_device	*csdev;
 	struct miscdevice	miscdev;
 	spinlock_t		spinlock;
+	pid_t			pid;
 	bool			reading;
 	union {
 		char		*buf;		/* TMC ETB */
-- 
2.17.1


  parent reply	other threads:[~2019-04-25 19:53 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-25 19:52 [PATCH 00/32] coresight: next v5.1-rc6 Mathieu Poirier
2019-04-25 19:52 ` [PATCH 01/32] coresight: catu: fix clang build warning Mathieu Poirier
2019-04-25 19:52 ` [PATCH 02/32] coresight: catu: Make catu_helper_ops and catu_ops static Mathieu Poirier
2019-04-25 19:52 ` [PATCH 03/32] coresight: tmc: Report DMA setup failures Mathieu Poirier
2019-04-25 19:52 ` [PATCH 04/32] coresight: dynamic-replicator: Clean up error handling Mathieu Poirier
2019-04-25 19:52 ` [PATCH 05/32] coresight: replicator: Prepare for merging with dynamic-replicator Mathieu Poirier
2019-04-25 19:52 ` [PATCH 06/32] coresight: dynamic-replicator: Prepare for merging with static replicator Mathieu Poirier
2019-04-25 19:52 ` [PATCH 07/32] coresight: Merge the static and dynamic replicator drivers Mathieu Poirier
2019-04-25 19:52 ` [PATCH 08/32] coresight: Fix freeing up the coresight connections Mathieu Poirier
2019-04-25 19:52 ` [PATCH 09/32] coresight: etb10: Cleanup power management Mathieu Poirier
2019-04-25 19:52 ` [PATCH 10/32] coresight: tpiu: " Mathieu Poirier
2019-04-25 19:52 ` [PATCH 11/32] coresight: catu: " Mathieu Poirier
2019-04-25 19:52 ` [PATCH 12/32] coresight: tmc: " Mathieu Poirier
2019-04-25 19:52 ` [PATCH 13/32] coresight: pmu: Adding ITRACE property to cs_etm PMU Mathieu Poirier
2019-04-25 19:52 ` [PATCH 14/32] coresight: etm4x: Add kernel configuration for CONTEXTID Mathieu Poirier
2019-04-25 19:52 ` [PATCH 15/32] coresight: etm4x: Skip selector pair 0 Mathieu Poirier
2019-04-25 19:52 ` [PATCH 16/32] coresight: etm4x: Configure tracers to emit timestamps Mathieu Poirier
2019-04-25 19:52 ` [PATCH 17/32] coresight: Adding return code to sink::disable() operation Mathieu Poirier
2019-04-25 19:52 ` [PATCH 18/32] coresight: Move reference counting inside sink drivers Mathieu Poirier
2019-04-25 19:52 ` [PATCH 19/32] coresight: Properly address errors in sink::disable() functions Mathieu Poirier
2019-04-25 19:52 ` [PATCH 20/32] coresight: Properly address concurrency in sink::update() functions Mathieu Poirier
2019-04-25 19:52 ` [PATCH 21/32] coresight: perf: Clean up function etm_setup_aux() Mathieu Poirier
2019-04-25 19:53 ` [PATCH 22/32] coresight: perf: Refactor function free_event_data() Mathieu Poirier
2019-04-25 19:53 ` [PATCH 23/32] coresight: Communicate perf event to sink buffer allocation functions Mathieu Poirier
2019-04-25 19:53 ` [PATCH 24/32] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf() Mathieu Poirier
2019-04-25 19:53 ` [PATCH 25/32] coresight: tmc-etr: Create per-thread buffer allocation function Mathieu Poirier
2019-04-25 19:53 ` [PATCH 26/32] coresight: tmc-etr: Introduce the notion of process ID to ETR devices Mathieu Poirier
2019-04-25 19:53 ` [PATCH 27/32] coresight: tmc-etr: Introduce the notion of reference counting " Mathieu Poirier
2019-04-25 19:53 ` [PATCH 28/32] coresight: tmc-etr: Introduce the notion of IDR " Mathieu Poirier
2019-04-25 19:53 ` [PATCH 29/32] coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios Mathieu Poirier
2019-04-25 19:53 ` Mathieu Poirier [this message]
2019-04-25 19:53 ` [PATCH 31/32] coresight: tmc-etf: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-04-25 19:53 ` [PATCH 32/32] coresight: etb10: " Mathieu Poirier

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