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From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Nicholas Piggin <npiggin@gmail.com>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v3 04/16] powerpc/40x: Don't use SPRN_SPRG_SCRATCH2 in EXCEPTION_PROLOG
Date: Tue, 30 Apr 2019 12:38:53 +0000 (UTC)	[thread overview]
Message-ID: <f922ea7e0fc4c827d9255b285cf93d2a10cb9448.1556627571.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1556627571.git.christophe.leroy@c-s.fr>

Unlike said in the comment, r1 is not reused by the critical
exception handler, as it uses a dedicated critirq_ctx stack.
Decrementing r1 early is then unneeded.

Should the above be valid, the code is crap buggy anyway as
r1 gets some intermediate values that would jeopardise the
whole process (for instance after mfspr   r1,SPRN_SPRG_THREAD)

Using SPRN_SPRG_SCRATCH2 to save r1 is then not needed, r11 can be
used instead. This avoids one mtspr and one mfspr and makes the
prolog closer to what's done on 6xx and 8xx.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/kernel/head_40x.S | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index a9c934f2319b..f49b0278e995 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -102,23 +102,20 @@ _ENTRY(saved_ksp_limit)
  * Exception vector entry code. This code runs with address translation
  * turned off (i.e. using physical addresses). We assume SPRG_THREAD has
  * the physical address of the current task thread_struct.
- * Note that we have to have decremented r1 before we write to any fields
- * of the exception frame, since a critical interrupt could occur at any
- * time, and it will write to the area immediately below the current r1.
  */
 #define NORMAL_EXCEPTION_PROLOG						     \
 	mtspr	SPRN_SPRG_SCRATCH0,r10;	/* save two registers to work with */\
 	mtspr	SPRN_SPRG_SCRATCH1,r11;					     \
-	mtspr	SPRN_SPRG_SCRATCH2,r1;					     \
 	mfcr	r10;			/* save CR in r10 for now	   */\
 	mfspr	r11,SPRN_SRR1;		/* check whether user or kernel    */\
 	andi.	r11,r11,MSR_PR;						     \
-	beq	1f;							     \
-	mfspr	r1,SPRN_SPRG_THREAD;	/* if from user, start at top of   */\
-	lwz	r1,TASK_STACK-THREAD(r1); /* this thread's kernel stack   */\
-	addi	r1,r1,THREAD_SIZE;					     \
-1:	subi	r1,r1,INT_FRAME_SIZE;	/* Allocate an exception frame     */\
 	tophys(r11,r1);							     \
+	beq	1f;							     \
+	mfspr	r11,SPRN_SPRG_THREAD;	/* if from user, start at top of   */\
+	lwz	r11,TASK_STACK-THREAD(r11); /* this thread's kernel stack */\
+	addi	r11,r11,THREAD_SIZE;					     \
+	tophys(r11,r11);						     \
+1:	subi	r11,r11,INT_FRAME_SIZE;	/* Allocate an exception frame     */\
 	stw	r10,_CCR(r11);          /* save various registers	   */\
 	stw	r12,GPR12(r11);						     \
 	stw	r9,GPR9(r11);						     \
@@ -128,11 +125,11 @@ _ENTRY(saved_ksp_limit)
 	stw	r12,GPR11(r11);						     \
 	mflr	r10;							     \
 	stw	r10,_LINK(r11);						     \
-	mfspr	r10,SPRN_SPRG_SCRATCH2;					     \
 	mfspr	r12,SPRN_SRR0;						     \
-	stw	r10,GPR1(r11);						     \
+	stw	r1,GPR1(r11);						     \
 	mfspr	r9,SPRN_SRR1;						     \
-	stw	r10,0(r11);						     \
+	stw	r1,0(r11);						     \
+	tovirt(r1,r11);			/* set new kernel sp */	\
 	rlwinm	r9,r9,0,14,12;		/* clear MSR_WE (necessary?)	   */\
 	stw	r0,GPR0(r11);						     \
 	SAVE_4GPRS(3, r11);						     \
-- 
2.13.3


  parent reply	other threads:[~2019-04-30 12:40 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-30 12:38 [PATCH v3 00/16] powerpc/32: Implement fast syscall entry Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 01/16] powerpc/32: Refactor EXCEPTION entry macros for head_8xx.S and head_32.S Christophe Leroy
2019-05-03  6:59   ` Michael Ellerman
2019-04-30 12:38 ` [PATCH v3 02/16] powerpc/32: move LOAD_MSR_KERNEL() into head_32.h and use it Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 03/16] powerpc/32: make the 6xx/8xx EXC_XFER_TEMPLATE() similar to the 40x/booke one Christophe Leroy
2019-04-30 12:38 ` Christophe Leroy [this message]
2019-04-30 12:38 ` [PATCH v3 05/16] powerpc/40x: add exception frame marker Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 06/16] powerpc/40x: Split and rename NORMAL_EXCEPTION_PROLOG Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 07/16] powerpc/40x: Refactor exception entry macros by using head_32.h Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 08/16] powerpc/fsl_booke: ensure SPEFloatingPointException() reenables interrupts Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 09/16] powerpc/32: enter syscall with MSR_EE inconditionaly set Christophe Leroy
2019-04-30 12:38 ` [PATCH v3 10/16] powerpc/32: Enter exceptions with MSR_EE unset Christophe Leroy
2019-04-30 12:39 ` [PATCH v3 11/16] powerpc/32: get rid of COPY_EE in exception entry Christophe Leroy
2019-04-30 12:39 ` [PATCH v3 12/16] powerpc: Fix 32-bit handling of MSR_EE on exceptions Christophe Leroy
2019-04-30 12:39 ` [PATCH v3 13/16] powerpc/32: implement fast entry for syscalls on non BOOKE Christophe Leroy
2019-04-30 12:39 ` [PATCH v3 14/16] powerpc/32: implement fast entry for syscalls on BOOKE Christophe Leroy
2019-05-23  6:14   ` Paul Mackerras
2019-05-23  7:00     ` Christophe Leroy
2019-05-23  8:10       ` Christophe Leroy
2019-05-28  5:37         ` Michael Ellerman
2019-05-28 17:03           ` Christophe Leroy
2019-06-03  9:16             ` Christophe Leroy
2019-06-04 16:59     ` Christophe Leroy
2019-04-30 12:39 ` [PATCH v3 15/16] powerpc/32: don't do syscall stuff in transfer_to_handler Christophe Leroy
2019-04-30 12:39 ` [PATCH v3 16/16] powerpc/32: Don't add dummy frames when calling trace_hardirqs_on/off Christophe Leroy

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