From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org
Cc: b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
cw00.choi@samsung.com, kyungmin.park@samsung.com,
m.szyprowski@samsung.com, s.nawrocki@samsung.com,
myungjoo.ham@samsung.com, keescook@chromium.org,
tony@atomide.com, jroedel@suse.de, treding@nvidia.com,
digetx@gmail.com, willy.mh.wolff.ml@gmail.com,
Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH v7 01/13] clk: samsung: add needed IDs for DMC clocks in Exynos5420
Date: Mon, 6 May 2019 17:11:49 +0200 [thread overview]
Message-ID: <1557155521-30949-2-git-send-email-l.luba@partner.samsung.com> (raw)
In-Reply-To: <1557155521-30949-1-git-send-email-l.luba@partner.samsung.com>
Define new IDs for clocks used by Dynamic Memory Controller in
Exynos5422 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
include/dt-bindings/clock/exynos5420.h | 28 ++++++++++++++++++++++------
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 355f469..bf50d8a 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -60,6 +60,7 @@
#define CLK_MAU_EPLL 159
#define CLK_SCLK_HSIC_12M 160
#define CLK_SCLK_MPHY_IXTAL24 161
+#define CLK_SCLK_BPLL 162
/* gate clocks */
#define CLK_UART0 257
@@ -195,6 +196,16 @@
#define CLK_ACLK432_CAM 518
#define CLK_ACLK_FL1550_CAM 519
#define CLK_ACLK550_CAM 520
+#define CLK_CLKM_PHY0 521
+#define CLK_CLKM_PHY1 522
+#define CLK_ACLK_PPMU_DREX0_0 523
+#define CLK_ACLK_PPMU_DREX0_1 524
+#define CLK_ACLK_PPMU_DREX1_0 525
+#define CLK_ACLK_PPMU_DREX1_1 526
+#define CLK_PCLK_PPMU_DREX0_0 527
+#define CLK_PCLK_PPMU_DREX0_1 528
+#define CLK_PCLK_PPMU_DREX1_0 529
+#define CLK_PCLK_PPMU_DREX1_1 530
/* mux clocks */
#define CLK_MOUT_HDMI 640
@@ -217,6 +228,8 @@
#define CLK_MOUT_EPLL 657
#define CLK_MOUT_MAU_EPLL 658
#define CLK_MOUT_USER_MAU_EPLL 659
+#define CLK_MOUT_SCLK_SPLL 660
+#define CLK_MOUT_MX_MSPLL_CCORE_PHY 661
/* divider clocks */
#define CLK_DOUT_PIXEL 768
@@ -243,13 +256,16 @@
#define CLK_DOUT_ACLK300_GSCL 789
#define CLK_DOUT_ACLK400_DISP1 790
#define CLK_DOUT_PCLK_CDREX 791
-#define CLK_DOUT_SCLK_CDREX 792
-#define CLK_DOUT_ACLK_CDREX1 793
-#define CLK_DOUT_CCLK_DREX0 794
-#define CLK_DOUT_CLK2X_PHY0 795
-#define CLK_DOUT_PCLK_CORE_MEM 796
+#define CLK_DOUT_PCLK_DREX0 792
+#define CLK_DOUT_PCLK_DREX1 793
+#define CLK_DOUT_SCLK_CDREX 794
+#define CLK_DOUT_ACLK_CDREX1 795
+#define CLK_DOUT_CCLK_DREX0 796
+#define CLK_DOUT_CLK2X_PHY0 797
+#define CLK_DOUT_PCLK_CORE_MEM 798
+#define CLK_FF_DOUT_SPLL2 799
/* must be greater than maximal clock id */
-#define CLK_NR_CLKS 797
+#define CLK_NR_CLKS 800
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5420_H */
--
2.7.4
next prev parent reply other threads:[~2019-05-06 15:13 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190506151210eucas1p2c0821ddc691b150725b38398295f8d9b@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 0/13] Exynos5 Dynamic Memory Controller driver Lukasz Luba
[not found] ` <CGME20190506151210eucas1p13c2a4b86a6f987ff34fbe1e2d705fbbf@eucas1p1.samsung.com>
2019-05-06 15:11 ` Lukasz Luba [this message]
2019-05-07 7:33 ` [PATCH v7 01/13] clk: samsung: add needed IDs for DMC clocks in Exynos5420 Chanwoo Choi
2019-05-07 8:51 ` Lukasz Luba
2019-05-07 9:17 ` Chanwoo Choi
2019-05-07 9:25 ` Lukasz Luba
[not found] ` <CGME20190506151211eucas1p2d96d7eaa4cda8f8d1787d8f1f1461b9b@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 02/13] clk: samsung: add new clocks for DMC for Exynos5422 SoC Lukasz Luba
2019-05-07 7:36 ` Chanwoo Choi
2019-05-07 8:59 ` Lukasz Luba
[not found] ` <CGME20190506151212eucas1p24110f75fa6ed945f9ae7614fbb8aa13d@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC Lukasz Luba
2019-05-07 7:36 ` Chanwoo Choi
2019-05-07 9:02 ` Lukasz Luba
[not found] ` <CGME20190506151213eucas1p2ca40029d09ddbbcd11e4a1dd60ae9654@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 04/13] dt-bindings: ddr: rename lpddr2 directory Lukasz Luba
2019-05-07 16:57 ` Rob Herring
2019-05-08 8:31 ` Lukasz Luba
[not found] ` <CGME20190506151214eucas1p17114a7dce506c77ae0bb96b93fd2d838@eucas1p1.samsung.com>
2019-05-06 15:11 ` [PATCH v7 05/13] dt-bindings: ddr: add LPDDR3 memories Lukasz Luba
2019-05-07 17:00 ` Rob Herring
2019-05-08 8:37 ` Lukasz Luba
[not found] ` <CGME20190506151214eucas1p2e87194b1ce66f7184d6770818d02814d@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 06/13] drivers: memory: extend of_memory by LPDDR3 support Lukasz Luba
[not found] ` <CGME20190506151215eucas1p2c57147edac5671c5ec9a223efb6b4adc@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 07/13] dt-bindings: memory-controllers: add Exynos5422 DMC device description Lukasz Luba
2019-05-07 17:04 ` Rob Herring
2019-05-08 7:19 ` Krzysztof Kozlowski
2019-05-08 9:45 ` Lukasz Luba
2019-05-08 10:19 ` Krzysztof Kozlowski
2019-05-08 20:35 ` Rob Herring
2019-05-10 13:12 ` Lukasz Luba
2019-05-08 9:17 ` Lukasz Luba
[not found] ` <CGME20190506151216eucas1p2f0c5ba0920b256789240b87fbb88f3fe@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 08/13] drivers: memory: add DMC driver for Exynos5422 Lukasz Luba
2019-05-08 7:11 ` Krzysztof Kozlowski
2019-05-08 9:32 ` Lukasz Luba
[not found] ` <CGME20190506151217eucas1p2c9348f2766870e7c22c2dabaab5d57a1@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 09/13] drivers: devfreq: events: add Exynos PPMU new events Lukasz Luba
[not found] ` <CGME20190506151218eucas1p1f3bf0b48470595537a893bd0b39e75b7@eucas1p1.samsung.com>
2019-05-06 15:11 ` [PATCH v7 10/13] ARM: dts: exynos: add chipid label and syscon compatible Lukasz Luba
[not found] ` <CGME20190506151219eucas1p2feab00f7b7c1c5fdd5614423fb38eae2@eucas1p2.samsung.com>
2019-05-06 15:11 ` [PATCH v7 11/13] ARM: dts: exynos: add syscon to clock compatible Lukasz Luba
2019-05-08 7:22 ` Krzysztof Kozlowski
2019-05-08 9:50 ` Lukasz Luba
2019-05-08 10:17 ` Krzysztof Kozlowski
2019-05-08 13:13 ` Lukasz Luba
[not found] ` <CGME20190506151219eucas1p2b5c3368873696f51e7d0d3a3e6d6bf1e@eucas1p2.samsung.com>
2019-05-06 15:12 ` [PATCH v7 12/13] ARM: dts: exynos: add DMC device for exynos5422 Lukasz Luba
2019-05-08 7:25 ` Krzysztof Kozlowski
2019-05-08 10:05 ` Lukasz Luba
[not found] ` <CGME20190506151220eucas1p237812f2420594eb651d80cf91076510c@eucas1p2.samsung.com>
2019-05-06 15:12 ` [PATCH v7 13/13] ARM: exynos_defconfig: enable DMC driver Lukasz Luba
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