From: Anson Huang <anson.huang@nxp.com>
To: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"festevam@gmail.com" <festevam@gmail.com>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"l.stach@pengutronix.de" <l.stach@pengutronix.de>,
Abel Vesa <abel.vesa@nxp.com>,
"andrew.smirnov@gmail.com" <andrew.smirnov@gmail.com>,
"ccaione@baylibre.com" <ccaione@baylibre.com>,
"angus@akkea.ca" <angus@akkea.ca>,
"agx@sigxcpu.org" <agx@sigxcpu.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Cc: dl-linux-imx <linux-imx@nxp.com>
Subject: [PATCH 2/3] clk: imx8mq: add SNVS clock to clock tree
Date: Wed, 15 May 2019 01:09:30 +0000 [thread overview]
Message-ID: <1557882259-3353-2-git-send-email-Anson.Huang@nxp.com> (raw)
In-Reply-To: <1557882259-3353-1-git-send-email-Anson.Huang@nxp.com>
i.MX8MQ has clock gate for SNVS module, add it into clock tree
for SNVS RTC driver to manage.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
drivers/clk/imx/clk-imx8mq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index daf1841..24c3464 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -507,6 +507,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_CLK_SAI5_IPG] = imx_clk_gate2_shared2("sai5_ipg_clk", "ipg_audio_root", base + 0x4370, 0, &share_count_sai5);
clks[IMX8MQ_CLK_SAI6_ROOT] = imx_clk_gate2_shared2("sai6_root_clk", "sai6", base + 0x4380, 0, &share_count_sai6);
clks[IMX8MQ_CLK_SAI6_IPG] = imx_clk_gate2_shared2("sai6_ipg_clk", "ipg_audio_root", base + 0x4380, 0, &share_count_sai6);
+ clks[IMX8MQ_CLK_SNVS_ROOT] = imx_clk_gate4("snvs_root_clk", "ipg_root", base + 0x4470, 0);
clks[IMX8MQ_CLK_UART1_ROOT] = imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0);
clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
--
2.7.4
next prev parent reply other threads:[~2019-05-15 1:09 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-15 1:09 [PATCH 1/3] dt-bindings: clock: imx8mq: Add SNVS clock Anson Huang
2019-05-15 1:09 ` Anson Huang [this message]
2019-05-23 0:59 ` [PATCH 2/3] clk: imx8mq: add SNVS clock to clock tree Shawn Guo
2019-05-15 1:09 ` [PATCH 3/3] arm64: dts: imx8mq: add clock for SNVS RTC node Anson Huang
2019-05-23 1:02 ` Shawn Guo
2019-05-24 5:52 ` Anson Huang
2019-05-15 10:21 ` [PATCH 1/3] dt-bindings: clock: imx8mq: Add SNVS clock Leonard Crestez
2019-05-23 0:58 ` Shawn Guo
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