From: Luwei Kang <luwei.kang@intel.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
hpa@zytor.com, x86@kernel.org, pbonzini@redhat.com,
rkrcmar@redhat.com, Luwei Kang <luwei.kang@intel.com>
Subject: [PATCH v1 6/6] KVM: VMX: Get PT state from xsave area to variables
Date: Thu, 16 May 2019 16:25:14 +0800 [thread overview]
Message-ID: <1557995114-21629-7-git-send-email-luwei.kang@intel.com> (raw)
In-Reply-To: <1557995114-21629-1-git-send-email-luwei.kang@intel.com>
This patch get the Intel PT state from xsave area to
variables when PT is change from enabled to disabled.
Because PT state is saved/restored to/from xsave area
by XSAVES/XRSTORES instructions when Intel PT is enabled.
The KVM guest may read this MSRs when PT is disabled
but the real value is saved in xsave area not variables.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
---
arch/x86/kvm/vmx/vmx.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d323e6b..d3e2569 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1000,6 +1000,16 @@ static inline void pt_save_msr(struct pt_state *ctx, u32 addr_range)
rdmsrl(MSR_IA32_RTIT_ADDR0_A + i, ctx->rtit_addrx_ab[i]);
}
+static void pt_state_get(struct pt_state *ctx, struct fpu *fpu, u32 addr_range)
+{
+ char *buff = fpu->state.xsave.extended_state_area;
+
+ /* skip riti_ctl register */
+ memcpy(&ctx->rtit_output_base, buff + sizeof(u64),
+ sizeof(struct pt_state) - sizeof(u64) +
+ sizeof(u64) * addr_range * 2);
+}
+
static void pt_guest_enter(struct vcpu_vmx *vmx)
{
struct pt_desc *desc;
@@ -1040,6 +1050,9 @@ static void pt_guest_enter(struct vcpu_vmx *vmx)
pt_save_msr(desc->host_ctx, desc->addr_range);
pt_load_msr(desc->guest_ctx, desc->addr_range);
}
+ } else if (desc->pt_xsave && desc->guest_xs->initialized) {
+ pt_state_get(desc->guest_ctx, desc->guest_xs, desc->addr_range);
+ desc->guest_xs->initialized = 0;
}
}
--
1.8.3.1
next prev parent reply other threads:[~2019-05-16 8:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 8:25 [PATCH v1 0/6] KVM: VMX: Intel PT configuration switch using XSAVES/XRSTORS on VM-Entry/Exit Luwei Kang
2019-05-16 8:25 ` [PATCH v1 1/6] x86/fpu: Introduce new fpu state for Intel processor trace Luwei Kang
2019-05-16 8:25 ` [PATCH v1 2/6] KVM: VMX: Reuse the pt_state structure for PT context Luwei Kang
2019-05-16 8:25 ` [PATCH v1 3/6] KVM: VMX: Dymamic allocate Intel PT configuration state Luwei Kang
2019-05-16 8:25 ` [PATCH v1 4/6] KVM: VMX: Allocate XSAVE area for Intel PT configuration Luwei Kang
2019-05-16 8:25 ` [PATCH v1 5/6] KVM: VMX: Intel PT configration context switch using XSAVES/XRSTORS Luwei Kang
2019-05-16 8:25 ` Luwei Kang [this message]
2019-11-11 13:28 ` [PATCH v1 0/6] KVM: VMX: Intel PT configuration switch using XSAVES/XRSTORS on VM-Entry/Exit Paolo Bonzini
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