From: Xiang Zheng <zhengxiang9@huawei.com>
To: <linux-arm-kernel@lists.infradead.org>,
<kvmarm@lists.cs.columbia.edu>, <linux-kernel@vger.kernel.org>
Cc: <christoffer.dall@arm.com>, <marc.zyngier@arm.com>,
<james.morse@arm.com>, <julien.thierry@arm.com>,
<suzuki.poulose@arm.com>, <wanghaibin.wang@huawei.com>,
<shannon.zhaosl@gmail.com>, Xiang Zheng <zhengxiang9@huawei.com>
Subject: [PATCH] KVM: ARM64: Update perf event when setting PMU count value
Date: Sun, 19 May 2019 18:05:59 +0800 [thread overview]
Message-ID: <20190519100559.7188-1-zhengxiang9@huawei.com> (raw)
Guest will adjust the sample period and set PMU counter value when
it takes a long time to handle the PMU interrupts.
However, we don't have a corresponding change on the virtual PMU
which is emulated via a perf event. It could cause a large number
of PMU interrupts injected to guest. Then guest will get hang for
handling these interrupts.
So update the sample_period of perf event if the counter value is
changed to avoid this case.
Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com>
---
virt/kvm/arm/pmu.c | 54 +++++++++++++++++++++++++++++++++++++++++++++---------
1 file changed, 45 insertions(+), 9 deletions(-)
diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c
index 1c5b76c..cbad3ec 100644
--- a/virt/kvm/arm/pmu.c
+++ b/virt/kvm/arm/pmu.c
@@ -24,6 +24,11 @@
#include <kvm/arm_pmu.h>
#include <kvm/arm_vgic.h>
+static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc);
+static struct perf_event *kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu,
+ struct kvm_pmc *pmc,
+ struct perf_event_attr *attr);
+
/**
* kvm_pmu_get_counter_value - get PMU counter value
* @vcpu: The vcpu pointer
@@ -57,11 +62,29 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
*/
void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
{
- u64 reg;
+ u64 reg, counter, old_sample_period;
+ struct kvm_pmu *pmu = &vcpu->arch.pmu;
+ struct kvm_pmc *pmc = &pmu->pmc[select_idx];
+ struct perf_event *event;
+ struct perf_event_attr attr;
reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
? PMCCNTR_EL0 : PMEVCNTR0_EL0 + select_idx;
__vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
+
+ if (pmc->perf_event) {
+ attr = pmc->perf_event->attr;
+ old_sample_period = attr.sample_period;
+ counter = kvm_pmu_get_counter_value(vcpu, select_idx);
+ attr.sample_period = (-counter) & pmc->bitmask;
+ if (attr.sample_period == old_sample_period)
+ return;
+
+ kvm_pmu_stop_counter(vcpu, pmc);
+ event = kvm_pmu_create_perf_event(vcpu, pmc, &attr);
+ if (event)
+ pmc->perf_event = event;
+ }
}
/**
@@ -303,6 +326,24 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event,
}
}
+static struct perf_event *kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu,
+ struct kvm_pmc *pmc,
+ struct perf_event_attr *attr)
+{
+ struct perf_event *event;
+
+ event = perf_event_create_kernel_counter(attr, -1, current,
+ kvm_pmu_perf_overflow, pmc);
+
+ if (IS_ERR(event)) {
+ pr_err_once("kvm: pmu event creation failed %ld\n",
+ PTR_ERR(event));
+ return NULL;
+ }
+
+ return event;
+}
+
/**
* kvm_pmu_software_increment - do software increment
* @vcpu: The vcpu pointer
@@ -416,15 +457,10 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
/* The initial sample period (overflow count) of an event. */
attr.sample_period = (-counter) & pmc->bitmask;
- event = perf_event_create_kernel_counter(&attr, -1, current,
- kvm_pmu_perf_overflow, pmc);
- if (IS_ERR(event)) {
- pr_err_once("kvm: pmu event creation failed %ld\n",
- PTR_ERR(event));
- return;
- }
+ event = kvm_pmu_create_perf_event(vcpu, pmc, &attr);
- pmc->perf_event = event;
+ if (event)
+ pmc->perf_event = event;
}
bool kvm_arm_support_pmu_v3(void)
--
1.8.3.1
next reply other threads:[~2019-05-19 17:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-19 10:05 Xiang Zheng [this message]
2019-05-21 16:44 ` [PATCH] KVM: ARM64: Update perf event when setting PMU count value Andrew Murray
2019-06-12 13:47 ` Xiang Zheng
2019-06-17 19:24 ` Andrew Murray
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190519100559.7188-1-zhengxiang9@huawei.com \
--to=zhengxiang9@huawei.com \
--cc=christoffer.dall@arm.com \
--cc=james.morse@arm.com \
--cc=julien.thierry@arm.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=shannon.zhaosl@gmail.com \
--cc=suzuki.poulose@arm.com \
--cc=wanghaibin.wang@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).