[PATCH 15/21] EDAC, ghes: Moving code around ghes_edac_register()

From: Robert Richter <rrichter@marvell.com>
To: Borislav Petkov <bp@alien8.de>, Tony Luck <tony.luck@intel.com>,
	"James Morse" <james.morse@arm.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Robert Richter <rrichter@marvell.com>
Subject: [PATCH 15/21] EDAC, ghes: Moving code around ghes_edac_register()
Date: Wed, 29 May 2019 08:44:37 +0000	[thread overview]
Message-ID: <20190529084344.28562-16-rrichter@marvell.com> (raw)
In-Reply-To: <20190529084344.28562-1-rrichter@marvell.com>

This is in preparation of the next patch to make the changes there
more visible.

Signed-off-by: Robert Richter <rrichter@marvell.com>
---
 drivers/edac/ghes_edac.c | 97 ++++++++++++++++++++++------------------
 1 file changed, 53 insertions(+), 44 deletions(-)

diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index 083452a48b42..c39cdfdfb8db 100644
--- a/drivers/edac/ghes_edac.c
+++ b/drivers/edac/ghes_edac.c
@@ -645,45 +645,19 @@ static struct acpi_platform_list plat_list[] = {
 	{ } /* End */
 };
 
-int ghes_edac_register(struct ghes *ghes, struct device *dev)
+static int
+ghes_edac_register_one(int nid, struct ghes *ghes, struct device *parent)
 {
-	bool fake = false;
 	int rc;
 	struct mem_ctl_info *mci;
 	struct edac_mc_layer layers[1];
-	int idx = -1;
-
-	if (IS_ENABLED(CONFIG_X86)) {
-		/* Check if safe to enable on this system */
-		idx = acpi_match_platform_list(plat_list);
-		if (!force_load && idx < 0)
-			return -ENODEV;
-	} else {
-		idx = 0;
-	}
-
-	/*
-	 * We have only one logical memory controller to which all DIMMs belong.
-	 */
-	if (atomic_inc_return(&ghes_init) > 1)
-		return 0;
-
-	rc = mem_info_setup();
-	if (rc == -EINVAL) {
-		/* we've got a bogus BIOS */
-		fake = true;
-		rc = mem_info_setup_fake();
-	}
-	if (rc < 0) {
-		pr_err("Can't allocate memory for DIMM data\n");
-		return rc;
-	}
 
 	layers[0].type = EDAC_MC_LAYER_ALL_MEM;
 	layers[0].size = mem_info.num_dimm;
 	layers[0].is_virt_csrow = true;
 
-	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_edac_pvt));
+	mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers,
+			sizeof(struct ghes_edac_pvt));
 	if (!mci) {
 		pr_err("Can't allocate memory for EDAC data\n");
 		return -ENOMEM;
@@ -693,7 +667,7 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
 	ghes_pvt->ghes	= ghes;
 	ghes_pvt->mci	= mci;
 
-	mci->pdev = dev;
+	mci->pdev = parent;
 	mci->mtype_cap = MEM_FLAG_EMPTY;
 	mci->edac_ctl_cap = EDAC_FLAG_NONE;
 	mci->edac_cap = EDAC_FLAG_NONE;
@@ -701,19 +675,6 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
 	mci->ctl_name = "ghes_edac";
 	mci->dev_name = "ghes";
 
-	if (fake) {
-		pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
-		pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
-		pr_info("work on such system. Use this driver with caution\n");
-	} else if (idx < 0) {
-		pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
-		pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
-		pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
-		pr_info("If you find incorrect reports, please contact your hardware vendor\n");
-		pr_info("to correct its BIOS.\n");
-		pr_info("This system has %d DIMM sockets.\n", mem_info.num_dimm);
-	}
-
 	mci_add_dimm_info(mci);
 
 	rc = edac_mc_add_mc(mci);
@@ -738,3 +699,51 @@ void ghes_edac_unregister(struct ghes *ghes)
 
 	kfree(mem_info.dimms);
 }
+
+int ghes_edac_register(struct ghes *ghes, struct device *dev)
+{
+	bool fake = false;
+	int rc;
+	int idx = -1;
+
+	if (IS_ENABLED(CONFIG_X86)) {
+		/* Check if safe to enable on this system */
+		idx = acpi_match_platform_list(plat_list);
+		if (!force_load && idx < 0)
+			return -ENODEV;
+	} else {
+		idx = 0;
+	}
+
+	/* We have only one ghes instance at a time. */
+	if (atomic_inc_return(&ghes_init) > 1)
+		return 0;
+
+	rc = mem_info_setup();
+	if (rc == -EINVAL) {
+		/* we've got a bogus BIOS */
+		fake = true;
+		rc = mem_info_setup_fake();
+	}
+	if (rc < 0) {
+		pr_err("Can't allocate memory for DIMM data\n");
+		return rc;
+	}
+
+	if (fake) {
+		pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
+		pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
+		pr_info("work on such system. Use this driver with caution\n");
+	} else if (idx < 0) {
+		pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
+		pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
+		pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
+		pr_info("If you find incorrect reports, please contact your hardware vendor\n");
+		pr_info("to correct its BIOS.\n");
+		pr_info("This system has %d DIMM sockets.\n", mem_info.num_dimm);
+	}
+
+	rc = ghes_edac_register_one(0, ghes, dev);
+
+	return rc;
+}
-- 
2.20.1

