[PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs

From: kan.liang@linux.intel.com
To: mingo@redhat.com, peterz@infradead.org, bp@alien8.de,
	tglx@linutronix.de, linux-kernel@vger.kernel.org, x86@kernel.org
Cc: qiuxu.zhuo@intel.com, tony.luck@intel.com, rui.zhang@intel.com,
	Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs
Date: Mon,  3 Jun 2019 06:41:21 -0700	[thread overview]
Message-ID: <20190603134122.13853-2-kan.liang@linux.intel.com> (raw)
In-Reply-To: <20190603134122.13853-1-kan.liang@linux.intel.com>

From: Kan Liang <kan.liang@linux.intel.com>

Add new model number for Icelake desktop and server to perf.

The data source encoding for Icelake server is the same as Skylake
server.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
 arch/x86/events/intel/core.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 546d13e436aa..c915afdaaba6 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4940,6 +4940,9 @@ __init int intel_pmu_init(void)
 		break;
 
 	case INTEL_FAM6_ICELAKE_MOBILE:
+	case INTEL_FAM6_ICELAKE_DESKTOP:
+	case INTEL_FAM6_ICELAKE_X:
+	case INTEL_FAM6_ICELAKE_XEON_D:
 		x86_pmu.late_ack = true;
 		memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -4962,7 +4965,9 @@ __init int intel_pmu_init(void)
 		x86_pmu.cpu_events = get_icl_events_attrs();
 		x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
 		x86_pmu.lbr_pt_coexist = true;
-		intel_pmu_pebs_data_source_skl(false);
+		intel_pmu_pebs_data_source_skl(
+			(boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_X) ||
+			(boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_XEON_D));
 		pr_cont("Icelake events, ");
 		name = "icelake";
 		break;
-- 
2.14.5

