From: Oded Gabbay <oded.gabbay@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: gregkh@linuxfoundation.org
Subject: [PATCH 5/8] habanalabs: set Goya CPU to use ASIC MMU
Date: Tue, 11 Jun 2019 08:50:42 +0300 [thread overview]
Message-ID: <20190611055045.15945-6-oded.gabbay@gmail.com> (raw)
In-Reply-To: <20190611055045.15945-1-oded.gabbay@gmail.com>
This patch configures the Goya CPU to actually go through the MMU for
translation. The configuration is done after the configuration of the
relevant MMU mappings.
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
---
drivers/misc/habanalabs/goya/goya.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index 4e41f2669e6d..9f1f47770afa 100644
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -986,9 +986,9 @@ int goya_init_cpu_queues(struct hl_device *hdev)
WREG32(mmPSOC_GLOBAL_CONF_SCRATCHPAD_3, upper_32_bits(eq->bus_address));
WREG32(mmPSOC_GLOBAL_CONF_SCRATCHPAD_8,
- lower_32_bits(hdev->cpu_accessible_dma_address));
+ lower_32_bits(VA_CPU_ACCESSIBLE_MEM_ADDR));
WREG32(mmPSOC_GLOBAL_CONF_SCRATCHPAD_9,
- upper_32_bits(hdev->cpu_accessible_dma_address));
+ upper_32_bits(VA_CPU_ACCESSIBLE_MEM_ADDR));
WREG32(mmPSOC_GLOBAL_CONF_SCRATCHPAD_5, HL_QUEUE_SIZE_IN_BYTES);
WREG32(mmPSOC_GLOBAL_CONF_SCRATCHPAD_4, HL_EQ_SIZE_IN_BYTES);
@@ -3011,7 +3011,13 @@ static void goya_dma_pool_free(struct hl_device *hdev, void *vaddr,
void *goya_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size,
dma_addr_t *dma_handle)
{
- return hl_fw_cpu_accessible_dma_pool_alloc(hdev, size, dma_handle);
+ void *vaddr;
+
+ vaddr = hl_fw_cpu_accessible_dma_pool_alloc(hdev, size, dma_handle);
+ *dma_handle = (*dma_handle) - hdev->cpu_accessible_dma_address +
+ VA_CPU_ACCESSIBLE_MEM_ADDR;
+
+ return vaddr;
}
void goya_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size,
@@ -4667,6 +4673,14 @@ static int goya_mmu_add_mappings_for_device_cpu(struct hl_device *hdev)
}
}
+ goya_mmu_prepare_reg(hdev, mmCPU_IF_ARUSER_OVR, HL_KERNEL_ASID_ID);
+ goya_mmu_prepare_reg(hdev, mmCPU_IF_AWUSER_OVR, HL_KERNEL_ASID_ID);
+ WREG32(mmCPU_IF_ARUSER_OVR_EN, 0x7FF);
+ WREG32(mmCPU_IF_AWUSER_OVR_EN, 0x7FF);
+
+ /* Make sure configuration is flushed to device */
+ RREG32(mmCPU_IF_AWUSER_OVR_EN);
+
goya->device_cpu_mmu_mappings_done = true;
return 0;
@@ -4702,6 +4716,9 @@ void goya_mmu_remove_device_cpu_mappings(struct hl_device *hdev)
if (!goya->device_cpu_mmu_mappings_done)
return;
+ WREG32(mmCPU_IF_ARUSER_OVR_EN, 0);
+ WREG32(mmCPU_IF_AWUSER_OVR_EN, 0);
+
if (!(hdev->cpu_accessible_dma_address & (PAGE_SIZE_2MB - 1))) {
if (hl_mmu_unmap(hdev->kernel_ctx, VA_CPU_ACCESSIBLE_MEM_ADDR,
PAGE_SIZE_2MB))
--
2.17.1
next prev parent reply other threads:[~2019-06-11 5:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 5:50 [PATCH 0/8] Fixing DMA mask issues in habanalabs driver Oded Gabbay
2019-06-11 5:50 ` [PATCH 1/8] habanalabs: initialize device CPU queues after MMU init Oded Gabbay
2019-06-11 5:50 ` [PATCH 2/8] habanalabs: de-couple MMU and VM module initialization Oded Gabbay
2019-06-11 5:50 ` [PATCH 3/8] habanalabs: initialize MMU context for driver Oded Gabbay
2019-06-11 5:50 ` [PATCH 4/8] habanalabs: add MMU mappings for Goya CPU Oded Gabbay
2019-06-11 5:50 ` Oded Gabbay [this message]
2019-06-11 5:50 ` [PATCH 6/8] habanalabs: remove DMA mask hack for Goya Oded Gabbay
2019-06-11 5:50 ` [PATCH 7/8] habanalabs: add WARN in case of bad MMU mapping Oded Gabbay
2019-06-11 5:50 ` [PATCH 8/8] habanalabs: enable 64-bit DMA mask in POWER9 Oded Gabbay
2019-06-11 7:59 ` Greg KH
2019-06-11 8:08 ` Oded Gabbay
2019-06-11 8:47 ` Oded Gabbay
2019-06-11 15:12 ` Christoph Hellwig
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