From: kan.liang@linux.intel.com
To: peterz@infradead.org, acme@kernel.org, mingo@redhat.com,
linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com,
Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V2 1/8] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS
Date: Wed, 19 Jun 2019 12:21:56 -0700 [thread overview]
Message-ID: <20190619192203.3885-2-kan.liang@linux.intel.com> (raw)
In-Reply-To: <20190619192203.3885-1-kan.liang@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
TOPDOWN.SLOTS(0x0400) is not a generic event. It is only available on
fixed counter3.
Don't extend its mask to generic counters.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
New for V2
arch/x86/events/intel/core.c | 6 ++++--
arch/x86/include/asm/perf_event.h | 5 +++++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 4377bf6a6f82..f30d02830921 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5066,12 +5066,14 @@ __init int intel_pmu_init(void)
if (x86_pmu.event_constraints) {
/*
- * event on fixed counter2 (REF_CYCLES) only works on this
+ * event on fixed counter2 (REF_CYCLES) and
+ * fixed counter3 (TOPDOWN.SLOTS) only work on this
* counter, so do not extend mask to generic counters
*/
for_each_event_constraint(c, x86_pmu.event_constraints) {
if (c->cmask == FIXED_EVENT_FLAGS
- && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) {
+ && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES
+ && c->idxmsk64 != INTEL_PMC_MSK_FIXED_SLOTS) {
c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1;
}
c->idxmsk64 &=
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 1392d5e6e8d6..457d35a75ad3 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -167,6 +167,11 @@ struct x86_pmu_capability {
#define INTEL_PMC_IDX_FIXED_REF_CYCLES (INTEL_PMC_IDX_FIXED + 2)
#define INTEL_PMC_MSK_FIXED_REF_CYCLES (1ULL << INTEL_PMC_IDX_FIXED_REF_CYCLES)
+/* TOPDOWN.SLOTS: */
+#define MSR_ARCH_PERFMON_FIXED_CTR3 0x30c
+#define INTEL_PMC_IDX_FIXED_SLOTS (INTEL_PMC_IDX_FIXED + 3)
+#define INTEL_PMC_MSK_FIXED_SLOTS (1ULL << INTEL_PMC_IDX_FIXED_SLOTS)
+
/*
* We model BTS tracing as another fixed-mode PMC.
*
--
2.14.5
next prev parent reply other threads:[~2019-06-19 19:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-19 19:21 [PATCH V2 0/8] TopDown metrics support for Icelake kan.liang
2019-06-19 19:21 ` kan.liang [this message]
2019-06-19 19:21 ` [PATCH V2 2/8] perf/x86/intel: Basic support for metrics counters kan.liang
2019-06-19 19:21 ` [PATCH V2 3/8] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-06-19 19:21 ` [PATCH V2 4/8] perf/x86/intel: Support per thread RDPMC " kan.liang
2019-06-19 19:22 ` [PATCH V2 5/8] perf/x86/intel: Export TopDown events for Icelake kan.liang
2019-06-19 19:22 ` [PATCH V2 6/8] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-06-19 19:22 ` [PATCH V2 7/8] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-06-19 19:22 ` [PATCH V2 8/8] perf, tools: Add documentation for topdown metrics kan.liang
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