From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: linux-kernel@vger.kernel.org, Dmitry Osipenko <digetx@gmail.com>,
Jon Hunter <jonathanh@nvidia.com>,
Thierry Reding <treding@nvidia.com>,
Thierry Reding <thierry.reding@gmail.com>,
linux-tegra@vger.kernel.org (open list:TEGRA ARCHITECTURE
SUPPORT)
Subject: [PATCH 17/25] clocksource/drivers/tegra: Remove duplicated use of per_cpu_ptr
Date: Wed, 26 Jun 2019 16:46:43 +0200 [thread overview]
Message-ID: <20190626144651.16742-17-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20190626144651.16742-1-daniel.lezcano@linaro.org>
From: Dmitry Osipenko <digetx@gmail.com>
It was left unnoticed by accident, which means that the code could be
cleaned up a tad more.
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/timer-tegra.c | 42 ++++++++++++++++++-------------
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c
index 880ba67ca7ee..f172a57cc5fe 100644
--- a/drivers/clocksource/timer-tegra.c
+++ b/drivers/clocksource/timer-tegra.c
@@ -218,6 +218,19 @@ static inline unsigned int tegra_irq_idx_for_cpu(int cpu, bool tegra20)
return TIMER10_IRQ_IDX + cpu;
}
+static inline unsigned long tegra_rate_for_timer(struct timer_of *to,
+ bool tegra20)
+{
+ /*
+ * TIMER1-9 are fixed to 1MHz, TIMER10-13 are running off the
+ * parent clock.
+ */
+ if (tegra20)
+ return 1000000;
+
+ return timer_of_rate(to);
+}
+
static int __init tegra_init_timer(struct device_node *np, bool tegra20,
int rating)
{
@@ -270,32 +283,27 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20,
for_each_possible_cpu(cpu) {
struct timer_of *cpu_to = per_cpu_ptr(&tegra_to, cpu);
+ unsigned long flags = IRQF_TIMER | IRQF_NOBALANCING;
+ unsigned long rate = tegra_rate_for_timer(to, tegra20);
unsigned int base = tegra_base_for_cpu(cpu, tegra20);
unsigned int idx = tegra_irq_idx_for_cpu(cpu, tegra20);
+ unsigned int irq = irq_of_parse_and_map(np, idx);
- /*
- * TIMER1-9 are fixed to 1MHz, TIMER10-13 are running off the
- * parent clock.
- */
- if (tegra20)
- cpu_to->of_clk.rate = 1000000;
- else
- cpu_to->of_clk.rate = timer_of_rate(to);
-
- cpu_to = per_cpu_ptr(&tegra_to, cpu);
- cpu_to->of_base.base = timer_reg_base + base;
- cpu_to->clkevt.rating = rating;
- cpu_to->clkevt.cpumask = cpumask_of(cpu);
- cpu_to->clkevt.irq = irq_of_parse_and_map(np, idx);
- if (!cpu_to->clkevt.irq) {
+ if (!irq) {
pr_err("failed to map irq for cpu%d\n", cpu);
ret = -EINVAL;
goto out_irq;
}
+ cpu_to->clkevt.irq = irq;
+ cpu_to->clkevt.rating = rating;
+ cpu_to->clkevt.cpumask = cpumask_of(cpu);
+ cpu_to->of_base.base = timer_reg_base + base;
+ cpu_to->of_clk.rate = rate;
+
irq_set_status_flags(cpu_to->clkevt.irq, IRQ_NOAUTOEN);
- ret = request_irq(cpu_to->clkevt.irq, tegra_timer_isr,
- IRQF_TIMER | IRQF_NOBALANCING,
+
+ ret = request_irq(cpu_to->clkevt.irq, tegra_timer_isr, flags,
cpu_to->clkevt.name, &cpu_to->clkevt);
if (ret) {
pr_err("failed to set up irq for cpu%d: %d\n",
--
2.17.1
next prev parent reply other threads:[~2019-06-26 14:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 14:43 [GIT PULL] timer drivers for v5.4 Daniel Lezcano
2019-06-26 14:46 ` [PATCH 01/25] clocksource/drivers/timer-meson6: Update with SPDX Licence identifier Daniel Lezcano
2019-06-26 14:46 ` [PATCH 02/25] clocksource/drivers/ixp4xx: Implement delay timer Daniel Lezcano
2019-06-26 14:46 ` [PATCH 03/25] clocksource/drivers/arc_timer: Use BIT() instead of _BITUL() Daniel Lezcano
2019-06-26 14:46 ` [PATCH 04/25] clocksource/drivers/exynos_mct: Increase priority over ARM arch timer Daniel Lezcano
2019-06-26 14:46 ` [PATCH 05/25] clocksource/drivers/tegra: Support per-CPU timers on all Tegra's Daniel Lezcano
2019-06-26 14:46 ` [PATCH 06/25] clocksource/drivers/tegra: Unify timer code Daniel Lezcano
2019-06-26 14:46 ` [PATCH 07/25] clocksource/drivers/tegra: Reset hardware state on init Daniel Lezcano
2019-06-26 14:46 ` [PATCH 08/25] clocksource/drivers/tegra: Replace readl/writel with relaxed versions Daniel Lezcano
2019-06-26 14:46 ` [PATCH 09/25] clocksource/drivers/tegra: Release all IRQ's on request_irq() error Daniel Lezcano
2019-06-26 14:46 ` [PATCH 10/25] clocksource/drivers/tegra: Minor code clean up Daniel Lezcano
2019-06-26 14:46 ` [PATCH 11/25] clocksource/drivers/tegra: Support COMPILE_TEST universally Daniel Lezcano
2019-06-26 14:46 ` [PATCH 12/25] clocksource/drivers/tegra: Lower clocksource rating for some Tegra's Daniel Lezcano
2019-06-26 14:46 ` [PATCH 13/25] clocksource/drivers/tegra: Rename timer-tegra20.c to timer-tegra.c Daniel Lezcano
2019-06-26 14:46 ` [PATCH 14/25] clocksource/drivers/sysctr: Add nxp system counter timer driver support Daniel Lezcano
2019-06-26 14:46 ` [PATCH 15/25] clocksource/drivers/arm_arch_timer: Extract elf_hwcap use to arch-helper Daniel Lezcano
2019-06-26 14:46 ` [PATCH 16/25] clocksource/drivers/tegra: Restore timer rate on Tegra210 Daniel Lezcano
2019-06-26 14:46 ` Daniel Lezcano [this message]
2019-06-26 14:46 ` [PATCH 18/25] clocksource/drivers/tegra: Set and use timer's period Daniel Lezcano
2019-06-26 14:46 ` [PATCH 19/25] clocksource/drivers/tegra: Drop unneeded typecasting in one place Daniel Lezcano
2019-06-26 14:46 ` [PATCH 20/25] clocksource/drivers/tegra: Add verbose definition for 1MHz constant Daniel Lezcano
2019-06-26 14:46 ` [PATCH 21/25] clocksource/drivers/tegra: Restore base address before cleanup Daniel Lezcano
2019-06-26 14:46 ` [PATCH 22/25] clocksource/drivers/tegra: Cycles can't be 0 Daniel Lezcano
2019-06-26 14:46 ` [PATCH 23/25] clocksource/drivers/tegra: Set up maximum-ticks limit properly Daniel Lezcano
2019-06-26 14:46 ` [PATCH 24/25] clocksource/drivers/davinci: Add support for clockevents Daniel Lezcano
2019-06-26 14:46 ` [PATCH 25/25] clocksource/drivers/davinci: Add support for clocksource Daniel Lezcano
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