From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com,
l.subrahmanya@mobiveil.co.in, shawnguo@kernel.org,
leoyang.li@nxp.com, lorenzo.pieralisi@arm.com,
catalin.marinas@arm.com, will.deacon@arm.com
Cc: Mingkai.Hu@nxp.com, Minghuan.Lian@nxp.com, Xiaowei.Bao@nxp.com,
Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCHv6 04/28] PCI: mobiveil: Update the resource list traversal function
Date: Fri, 5 Jul 2019 17:56:32 +0800 [thread overview]
Message-ID: <20190705095656.19191-5-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20190705095656.19191-1-Zhiqiang.Hou@nxp.com>
Code that executes the resource list traversal does not need to
delete any node therefore using the *_safe() API version is
useless.
Replace function resource_list_for_each_entry_safe() with the
resource_list_for_each_entry() counterpart.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
---
V6:
- Rebased the patch, no functional change.
drivers/pci/controller/pcie-mobiveil.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index 53df317..c359654 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -562,7 +562,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
{
u32 value, pab_ctrl, type = 0;
int err;
- struct resource_entry *win, *tmp;
+ struct resource_entry *win;
err = mobiveil_bringup_link(pcie);
if (err) {
@@ -612,7 +612,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
/* Get the I/O and memory ranges from DT */
- resource_list_for_each_entry_safe(win, tmp, &pcie->resources) {
+ resource_list_for_each_entry(win, &pcie->resources) {
type = 0;
if (resource_type(win->res) == IORESOURCE_MEM)
type = MEM_WINDOW_TYPE;
--
1.7.1
next prev parent reply other threads:[~2019-07-05 10:07 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-05 9:56 [PATCHv6 00/28] PCI: mobiveil: fixes for Mobiveil PCIe Host Bridge IP driver Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 01/28] PCI: mobiveil: Unify register accessors Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 02/28] PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSI Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 03/28] PCI: mobiveil: Fix PCI base address in MEM/IO outbound windows Hou Zhiqiang
2019-07-05 9:56 ` Hou Zhiqiang [this message]
2019-07-05 9:56 ` [PATCHv6 05/28] PCI: mobiveil: Use WIN_NUM_0 explicitly for CFG outbound window Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 06/28] PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 07/28] PCI: mobiveil: Fix the Class Code field Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 08/28] PCI: mobiveil: Move the link up waiting out of mobiveil_host_init() Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 09/28] PCI: mobiveil: Move IRQ chained handler setup out of DT parse Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 10/28] PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 11/28] PCI: mobiveil: Fix devfn check in mobiveil_pcie_valid_device() Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 12/28] dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 13/28] PCI: mobiveil: Reformat the code for readability Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 14/28] PCI: mobiveil: Make the register updating more readable Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 15/28] PCI: mobiveil: Revise the MEM/IO outbound window initialization Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 16/28] PCI: mobiveil: Fix the returned error number Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 17/28] PCI: mobiveil: Remove an unnecessary return value check Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 18/28] PCI: mobiveil: Remove redundant var definitions and register read operations Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 19/28] PCI: mobiveil: Fix the valid check for inbound and outbound window Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 20/28] PCI: mobiveil: Add the statistic of initialized inbound windows Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 21/28] PCI: mobiveil: Clear the target fields before updating the register Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 22/28] PCI: mobiveil: Mask out the lower 10-bit hardcode window size Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 23/28] PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 24/28] PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 25/28] PCI: mobiveil: Fix the CPU " Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 26/28] PCI: mobiveil: Move PCIe PIO enablement out of inbound window routine Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 27/28] PCI: mobiveil: Fix infinite-loop in the INTx process Hou Zhiqiang
2019-07-05 9:56 ` [PATCHv6 28/28] PCI: mobiveil: Fix the potential INTx missing problem Hou Zhiqiang
2019-07-08 11:35 ` [PATCHv6 00/28] PCI: mobiveil: fixes for Mobiveil PCIe Host Bridge IP driver Lorenzo Pieralisi
2019-07-10 10:59 ` Z.q. Hou
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