linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
To: agross@kernel.org, david.brown@linaro.org, robh+dt@kernel.org,
	mark.rutland@arm.com, mturquette@baylibre.com, sboyd@kernel.org,
	jassisinghbrar@gmail.com, ohad@wizery.com,
	bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-remoteproc@vger.kernel.org,
	sricharan@codeaurora.org, gokulsri@codeaurora.org
Subject: [PATCH 01/12] remoteproc: qcom: Add PRNG proxy clock
Date: Thu, 11 Jul 2019 21:10:57 +0530	[thread overview]
Message-ID: <1562859668-14209-2-git-send-email-gokulsri@codeaurora.org> (raw)
In-Reply-To: <1562859668-14209-1-git-send-email-gokulsri@codeaurora.org>

PRNG clock is needed by the secure PIL, support for the same
is added in subsequent patches.

Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_wcss.c | 63 +++++++++++++++++++++++++++----------
 1 file changed, 46 insertions(+), 17 deletions(-)

diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c
index 0821c94..dc2bae4 100644
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -88,18 +88,6 @@ enum {
 	WCSS_QCS404,
 };
 
-struct wcss_data {
-	const char *firmware_name;
-	int crash_reason_smem;
-	u8 version;
-	bool aon_reset_required;
-	const char *ssr_name;
-	const char *sysmon_name;
-	int ssctl_id;
-	const struct rproc_ops *ops;
-	bool requires_force_stop;
-};
-
 struct q6v5_wcss {
 	struct device *dev;
 
@@ -124,6 +112,7 @@ struct q6v5_wcss {
 	struct clk *qdsp6ss_xo_cbcr;
 	struct clk *qdsp6ss_core_gfmux;
 	struct clk *wcss_bcr_cbcr;
+	struct clk *prng_clk;
 	struct regulator *cx_supply;
 
 	struct qcom_rproc_glink glink_subdev;
@@ -146,6 +135,20 @@ struct q6v5_wcss {
 	bool requires_force_stop;
 };
 
+struct wcss_data {
+	int (*init_clock)(struct q6v5_wcss *wcss);
+	int (*init_regulator)(struct q6v5_wcss *wcss);
+	const char *firmware_name;
+	int crash_reason_smem;
+	u8 version;
+	bool aon_reset_required;
+	const char *ssr_name;
+	const char *sysmon_name;
+	int ssctl_id;
+	const struct rproc_ops *ops;
+	bool requires_force_stop;
+};
+
 static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
 {
 	int ret;
@@ -235,6 +238,12 @@ static int q6v5_wcss_start(struct rproc *rproc)
 	struct q6v5_wcss *wcss = rproc->priv;
 	int ret;
 
+	ret = clk_prepare_enable(wcss->prng_clk);
+	if (ret) {
+		dev_err(wcss->dev, "prng clock enable failed\n");
+		return ret;
+	}
+
 	qcom_q6v5_prepare(&wcss->q6v5);
 
 	/* Release Q6 and WCSS reset */
@@ -703,6 +712,7 @@ static int q6v5_wcss_stop(struct rproc *rproc)
 			return ret;
 	}
 
+	clk_disable_unprepare(wcss->prng_clk);
 	qcom_q6v5_unprepare(&wcss->q6v5);
 
 	return 0;
@@ -858,7 +868,21 @@ static int q6v5_alloc_memory_region(struct q6v5_wcss *wcss)
 	return 0;
 }
 
-static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss)
+static int ipq8074_init_clock(struct q6v5_wcss *wcss)
+{
+	int ret;
+
+	wcss->prng_clk = devm_clk_get(wcss->dev, "prng");
+	if (IS_ERR(wcss->prng_clk)) {
+		ret = PTR_ERR(wcss->prng_clk);
+		if (ret != -EPROBE_DEFER)
+			dev_err(wcss->dev, "Failed to get prng clock\n");
+		return ret;
+	}
+	return 0;
+}
+
+static int qcs404_init_clock(struct q6v5_wcss *wcss)
 {
 	int ret;
 
@@ -973,7 +997,7 @@ static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss)
 	return 0;
 }
 
-static int q6v5_wcss_init_regulator(struct q6v5_wcss *wcss)
+static int qcs404_init_regulator(struct q6v5_wcss *wcss)
 {
 	wcss->cx_supply = devm_regulator_get(wcss->dev, "cx");
 	if (IS_ERR(wcss->cx_supply))
@@ -1017,12 +1041,14 @@ static int q6v5_wcss_probe(struct platform_device *pdev)
 	if (ret)
 		goto free_rproc;
 
-	if (wcss->version == WCSS_QCS404) {
-		ret = q6v5_wcss_init_clock(wcss);
+	if (desc->init_clock) {
+		ret = desc->init_clock(wcss);
 		if (ret)
 			goto free_rproc;
+	}
 
-		ret = q6v5_wcss_init_regulator(wcss);
+	if (desc->init_regulator) {
+		ret = desc->init_regulator(wcss);
 		if (ret)
 			goto free_rproc;
 	}
@@ -1067,6 +1093,7 @@ static int q6v5_wcss_remove(struct platform_device *pdev)
 }
 
 static const struct wcss_data wcss_ipq8074_res_init = {
+	.init_clock = ipq8074_init_clock,
 	.firmware_name = "IPQ8074/q6_fw.mdt",
 	.crash_reason_smem = 421,
 	.aon_reset_required = true,
@@ -1075,6 +1102,8 @@ static int q6v5_wcss_remove(struct platform_device *pdev)
 };
 
 static const struct wcss_data wcss_qcs404_res_init = {
+	.init_clock = qcs404_init_clock,
+	.init_regulator = qcs404_init_regulator,
 	.crash_reason_smem = 421,
 	.firmware_name = "wcnss.mdt",
 	.version = WCSS_QCS404,
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2019-07-11 15:48 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-11 15:40 [PATCH 00/12] remoteproc: qcom: q6v5-wcss: Add support for secure pil Gokul Sriram Palanisamy
2019-07-11 15:40 ` Gokul Sriram Palanisamy [this message]
2019-07-11 15:40 ` [PATCH 02/12] remoteproc: qcom: Add secure PIL support Gokul Sriram Palanisamy
2019-07-11 15:40 ` [PATCH 03/12] remoteproc: qcom: Add support for split q6 + m3 wlan firmware Gokul Sriram Palanisamy
2019-07-11 15:41 ` [PATCH 04/12] remoteproc: qcom: Add ssr subdevice identifier Gokul Sriram Palanisamy
2019-07-11 15:41 ` [PATCH 05/12] remoteproc: qcom: Update regmap offsets for halt register Gokul Sriram Palanisamy
2019-07-11 15:41 ` [PATCH 06/12] dt-bindings: clock: qcom: Add reset for WCSSAON Gokul Sriram Palanisamy
2019-07-17 20:08   ` Stephen Boyd
2019-07-24 20:37   ` Rob Herring
2019-07-11 15:41 ` [PATCH 07/12] clk: qcom: Add WCSSAON reset Gokul Sriram Palanisamy
2019-07-17 20:09   ` Stephen Boyd
2019-07-11 15:41 ` [PATCH 08/12] dt-bindings: mailbox: qom: Add ipq8074 APPS compatible Gokul Sriram Palanisamy
2019-07-24 20:37   ` Rob Herring
2019-07-11 15:41 ` [PATCH 09/12] mailbox: qcom: Add support for IPQ8074 APCS Gokul Sriram Palanisamy
2019-07-11 15:41 ` [PATCH 10/12] dt-bindings: firmware: qcom: Add compatible for IPQ8074 SoC Gokul Sriram Palanisamy
2019-07-24 20:38   ` Rob Herring
2019-07-11 15:41 ` [PATCH 11/12] arm64: dts: Add support for scm on IPQ8074 SoCs Gokul Sriram Palanisamy
2019-07-11 15:41 ` [PATCH 12/12] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC Gokul Sriram Palanisamy
2019-07-17 20:13   ` Stephen Boyd
2019-07-18  6:24     ` gokulsri
2019-07-12  5:43 ` [PATCH 00/12] remoteproc: qcom: q6v5-wcss: Add support for secure pil gokulsri

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1562859668-14209-2-git-send-email-gokulsri@codeaurora.org \
    --to=gokulsri@codeaurora.org \
    --cc=agross@kernel.org \
    --cc=bjorn.andersson@linaro.org \
    --cc=david.brown@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jassisinghbrar@gmail.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-remoteproc@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mturquette@baylibre.com \
    --cc=ohad@wizery.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=sricharan@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).