[v1,44/50] ARM: dts: exynos: change rate of bus_jpeg in Exynos5422
diff mbox series

Message ID 20190715124417.4787-45-l.luba@partner.samsung.com
State New
Headers show
Series
  • Exynos5x clocks and buses changes
Related show

Commit Message

Lukasz Luba July 15, 2019, 12:44 p.m. UTC
The bus_gen OPP table has been aligned to the parent rate. This patch sets
the proper initial frequency before the devfreq governor starts working.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
 arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 852cb3dd495d..27f6ed323ba1 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -131,6 +131,8 @@ 
 
 &bus_jpeg {
 	devfreq = <&bus_wcore>;
+	assigned-clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
+	assigned-clock-rates = <300000000>;
 	status = "okay";
 };