From: Marc Zyngier <maz@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Rob Herring <robh+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 8/9] dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support
Date: Tue, 23 Jul 2019 11:44:36 +0100 [thread overview]
Message-ID: <20190723104437.154403-9-maz@kernel.org> (raw)
In-Reply-To: <20190723104437.154403-1-maz@kernel.org>
Update the GICv3 binding to allow interrupts in the EPPI range.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
.../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
index 98a3ecda8e07..1fe147daca4c 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
@@ -44,12 +44,13 @@ properties:
be at least 4.
The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
- interrupts, 2 for interrupts in the Extended SPI range. Other values
- are reserved for future use.
+ interrupts, 2 for interrupts in the Extended SPI range, 3 for the
+ Extended PPI range. Other values are reserved for future use.
The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987]. PPI interrupts are in the
range [0-15]. Extented SPI interrupts are in the range [0-1023].
+ Extended PPI interrupts are in the range [0-127].
The 3rd cell is the flags, encoded as follows:
bits[3:0] trigger type and level flags.
--
2.20.1
next prev parent reply other threads:[~2019-07-23 10:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-23 10:44 [PATCH 0/9] irqchip/gic-v3: Add support for GICv3.1 extended PPI/SPI ranges Marc Zyngier
2019-07-23 10:44 ` [PATCH 1/9] irqchip/gic: Rework gic_configure_irq to take the full ICFGR base Marc Zyngier
2019-07-23 10:44 ` [PATCH 2/9] irqchip/gic-v3: Add INTID range and convertion primitives Marc Zyngier
2019-07-23 10:44 ` [PATCH 3/9] dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range support Marc Zyngier
2019-07-23 12:59 ` [PATCH 3/9] dt-bindings: interrupt-controller: arm, gic-v3: " Lokesh Vutla
2019-07-23 13:15 ` Marc Zyngier
2019-07-23 13:35 ` Lokesh Vutla
2019-07-23 10:44 ` [PATCH 4/9] irqchip/gic-v3: Add " Marc Zyngier
2019-07-23 12:50 ` Lokesh Vutla
2019-07-23 13:04 ` Marc Zyngier
2019-07-23 10:44 ` [PATCH 5/9] irqchip/gic: Prepare for more than 16 PPIs Marc Zyngier
2019-07-23 10:44 ` [PATCH 6/9] irqchip/gic-v3: Dynamically allocate PPI NMI refcounts Marc Zyngier
2019-07-23 10:44 ` [PATCH 7/9] irqchip/gic-v3: Dynamically allocate PPI partition descriptors Marc Zyngier
2019-07-23 10:44 ` Marc Zyngier [this message]
2019-07-23 10:44 ` [PATCH 9/9] irqchip/gic-v3: Add EPPI range support Marc Zyngier
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